Infineon TRAVEO T2G - 15.25.5 GPIO_VDD_INTR_MASKED

Technical Reference Manual 002-29852 Rev. *B
15.25.5 GPIO_VDD_INTR_MASKED
Description:
Supply detection interrupt masked register
Address:
0x4031401C
Offset:
0x401C
Retention:
Retained
IsDeepSleep:
No
Comment:
This register contains the AND-ed values of VDD_INTR and VDD_INTR_MASK registers
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name VDDIO_ACTIVE [7:0]
Bits 15 14 13 12 11 10 9 8
Name VDDIO_ACTIVE [15:8]
Bits 23 22 21 20 19 18 17 16
Name None [23:16]
Bits 31 30 29 28 27 26 25 24
Name VDDD
_ACTIVE
[31:31]
VDDA
_ACTIVE
[30:30]
None [29:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:15 VDDIO_ACTIVE R W 0 Supply transition detected AND masked
'0': Interrupt was not forwarded to CPU
'1': Interrupt occurred and was forwarded to CPU
30 VDDA_ACTIVE R W 0 Same as VDDIO_ACTIVE for the analog supply
VDDA.
31 VDDD_ACTIVE R W 0 Same as VDDIO_ACTIVE for the digital supply VDDD.
994
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers