Infineon TRAVEO T2G - 2.3.8 CANFD_ECC_ERR_INJ

Technical Reference Manual 002-29852 Rev. *B
2.3.8 CANFD_ECC_ERR_INJ
Description:
ECC error injection
Address:
0x40521084
Offset:
0x1084
Retention:
Retained
IsDeepSleep:
No
Comment:
Default:
0xFFFC
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name None [1:0]
Bits 15 14 13 12 11 10 9 8
Name ERR_ADDR [15:8]
Bits 23 22 21 20 19 18 17 16
Name None [23:21] ERR_EN
[20:20]
None [19:16]
Bits 31 30 29 28 27 26 25 24
Name None
[31:31]
ERR_PAR [30:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
2:15 ERR_ADDR RW R 16383 Specifies the address of the word where an error will
be injected on write or an non-correctable error will be
suppressed.
When the ERR_EN bit is set an error parity
(ERR_PAR) is injected when any write, from bus or a
CAN channel, is done to this address.
When the ERR_EN bit is set and the access address
matches ERR_ADDR then a non-correctable ECC
error or an Address error will NOT result in a bus error
or CAN channel shutdown.
Note that error reporting to the fault structure cannot
be suppressed.
20 ERR_EN RW R 0 Enable error injection (ECC_EN must be 1).
When this bit is set the error parity (ERR_PAR) will be
used when an AHB write is done to the ERR_ADDR
address.
When the error word is read a single or double error
will be reported to the fault structure just like for a real
ECC error (even if this bit is no longer set).
When this bit is set (and ECC_EN=1) a non-
correctable error (ECC or address error) for the
ERR_ADDR will not be reported back to the CAN
channel or AHB bus.
24:30 ERR_PAR RW R 0 ECC Parity bits to use for ECC error injection at
address ERR_ADDR.
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2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers