Infineon TRAVEO T2G - 9.2.1.18 CH_STRUCT 17; 9.2.1.19 CH_STRUCT 18; 9.2.1.20 CH_STRUCT 19; 9.2.1.21 CH_STRUCT 20

Technical Reference Manual 002-29852 Rev. *B
Register Name Address Permission Description
DW1_CH_STRUCT16_INTR_SET
0x40298414 FULL Interrupt set
DW1_CH_STRUCT16_INTR_MASK
0x40298418 FULL Interrupt mask
DW1_CH_STRUCT16_INTR_MASKED
0x4029841C FULL Interrupt masked
DW1_CH_STRUCT16_SRAM_DATA0
0x40298420 FULL SRAM data 0
DW1_CH_STRUCT16_SRAM_DATA1
0x40298424 FULL SRAM data 1
DW1_CH_STRUCT16_TR_CMD
0x40298428 FULL Channel software trigger
9.2.1.18 CH_STRUCT 17
Register Name Address Permission Description
DW1_CH_STRUCT17_CH_CTL
0x40298440 FULL Channel control
DW1_CH_STRUCT17_CH_STATUS
0x40298444 FULL Channel status
DW1_CH_STRUCT17_CH_IDX
0x40298448 FULL Channel current indices
DW1_CH_STRUCT17_CH_CURR_PTR
0x4029844C FULL Channel current descriptor pointer
DW1_CH_STRUCT17_INTR
0x40298450 FULL Interrupt
DW1_CH_STRUCT17_INTR_SET
0x40298454 FULL Interrupt set
DW1_CH_STRUCT17_INTR_MASK
0x40298458 FULL Interrupt mask
DW1_CH_STRUCT17_INTR_MASKED
0x4029845C FULL Interrupt masked
DW1_CH_STRUCT17_SRAM_DATA0
0x40298460 FULL SRAM data 0
DW1_CH_STRUCT17_SRAM_DATA1
0x40298464 FULL SRAM data 1
DW1_CH_STRUCT17_TR_CMD
0x40298468 FULL Channel software trigger
9.2.1.19 CH_STRUCT 18
Register Name Address Permission Description
DW1_CH_STRUCT18_CH_CTL
0x40298480 FULL Channel control
DW1_CH_STRUCT18_CH_STATUS
0x40298484 FULL Channel status
DW1_CH_STRUCT18_CH_IDX
0x40298488 FULL Channel current indices
DW1_CH_STRUCT18_CH_CURR_PTR
0x4029848C FULL Channel current descriptor pointer
DW1_CH_STRUCT18_INTR
0x40298490 FULL Interrupt
DW1_CH_STRUCT18_INTR_SET
0x40298494 FULL Interrupt set
DW1_CH_STRUCT18_INTR_MASK
0x40298498 FULL Interrupt mask
DW1_CH_STRUCT18_INTR_MASKED
0x4029849C FULL Interrupt masked
DW1_CH_STRUCT18_SRAM_DATA0
0x402984A0 FULL SRAM data 0
DW1_CH_STRUCT18_SRAM_DATA1
0x402984A4 FULL SRAM data 1
DW1_CH_STRUCT18_TR_CMD
0x402984A8 FULL Channel software trigger
9.2.1.20 CH_STRUCT 19
Register Name Address Permission Description
DW1_CH_STRUCT19_CH_CTL
0x402984C0 FULL Channel control
DW1_CH_STRUCT19_CH_STATUS
0x402984C4 FULL Channel status
DW1_CH_STRUCT19_CH_IDX
0x402984C8 FULL Channel current indices
DW1_CH_STRUCT19_CH_CURR_PTR
0x402984CC FULL Channel current descriptor pointer
DW1_CH_STRUCT19_INTR
0x402984D0 FULL Interrupt
DW1_CH_STRUCT19_INTR_SET
0x402984D4 FULL Interrupt set
DW1_CH_STRUCT19_INTR_MASK
0x402984D8 FULL Interrupt mask
DW1_CH_STRUCT19_INTR_MASKED
0x402984DC FULL Interrupt masked
DW1_CH_STRUCT19_SRAM_DATA0
0x402984E0 FULL SRAM data 0
DW1_CH_STRUCT19_SRAM_DATA1
0x402984E4 FULL SRAM data 1
DW1_CH_STRUCT19_TR_CMD
0x402984E8 FULL Channel software trigger
9.2.1.21 CH_STRUCT 20
Register Name Address Permission Description
DW1_CH_STRUCT20_CH_CTL
0x40298500 FULL Channel control
DW1_CH_STRUCT20_CH_STATUS
0x40298504 FULL Channel status
DW1_CH_STRUCT20_CH_IDX
0x40298508 FULL Channel current indices
DW1_CH_STRUCT20_CH_CURR_PTR
0x4029850C FULL Channel current descriptor pointer
DW1_CH_STRUCT20_INTR
0x40298510 FULL Interrupt
DW1_CH_STRUCT20_INTR_SET
0x40298514 FULL Interrupt set
DW1_CH_STRUCT20_INTR_MASK
0x40298518 FULL Interrupt mask
DW1_CH_STRUCT20_INTR_MASKED
0x4029851C FULL Interrupt masked
DW1_CH_STRUCT20_SRAM_DATA0
0x40298520 FULL SRAM data 0
DW1_CH_STRUCT20_SRAM_DATA1
0x40298524 FULL SRAM data 1
DW1_CH_STRUCT20_TR_CMD
0x40298528 FULL Channel software trigger
852
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers