Infineon TRAVEO T2G - 19.2.22 CH 21; 19.2.23 CH 22; 19.2.24 CH 23; 19.2.25 CH 24

Technical Reference Manual 002-29852 Rev. *B
Register Name Address Permission Description
PASS0_SAR1_CH20_INTR
0x40901D10 FULL Interrupt request register.
PASS0_SAR1_CH20_INTR_SET
0x40901D14 FULL Interrupt set request register
PASS0_SAR1_CH20_INTR_MASK
0x40901D18 FULL Interrupt mask register.
PASS0_SAR1_CH20_INTR_MASKED
0x40901D1C FULL Interrupt masked request register
PASS0_SAR1_CH20_WORK
0x40901D20 FULL Working data register
PASS0_SAR1_CH20_RESULT
0x40901D24 FULL Result data register
PASS0_SAR1_CH20_GRP_STAT
0x40901D28 FULL Group status register
PASS0_SAR1_CH20_ENABLE
0x40901D38 FULL Enable register
PASS0_SAR1_CH20_TR_CMD
0x40901D3C FULL Software triggers
19.2.22 CH 21
Register Name Address Permission Description
PASS0_SAR1_CH21_TR_CTL
0x40901D40 FULL Trigger control.
PASS0_SAR1_CH21_SAMPLE_CTL
0x40901D44 FULL Sample control.
PASS0_SAR1_CH21_POST_CTL
0x40901D48 FULL Post processing control
PASS0_SAR1_CH21_RANGE_CTL
0x40901D4C FULL Range thresholds
PASS0_SAR1_CH21_INTR
0x40901D50 FULL Interrupt request register.
PASS0_SAR1_CH21_INTR_SET
0x40901D54 FULL Interrupt set request register
PASS0_SAR1_CH21_INTR_MASK
0x40901D58 FULL Interrupt mask register.
PASS0_SAR1_CH21_INTR_MASKED
0x40901D5C FULL Interrupt masked request register
PASS0_SAR1_CH21_WORK
0x40901D60 FULL Working data register
PASS0_SAR1_CH21_RESULT
0x40901D64 FULL Result data register
PASS0_SAR1_CH21_GRP_STAT
0x40901D68 FULL Group status register
PASS0_SAR1_CH21_ENABLE
0x40901D78 FULL Enable register
PASS0_SAR1_CH21_TR_CMD
0x40901D7C FULL Software triggers
19.2.23 CH 22
Register Name Address Permission Description
PASS0_SAR1_CH22_TR_CTL
0x40901D80 FULL Trigger control.
PASS0_SAR1_CH22_SAMPLE_CTL
0x40901D84 FULL Sample control.
PASS0_SAR1_CH22_POST_CTL
0x40901D88 FULL Post processing control
PASS0_SAR1_CH22_RANGE_CTL
0x40901D8C FULL Range thresholds
PASS0_SAR1_CH22_INTR
0x40901D90 FULL Interrupt request register.
PASS0_SAR1_CH22_INTR_SET
0x40901D94 FULL Interrupt set request register
PASS0_SAR1_CH22_INTR_MASK
0x40901D98 FULL Interrupt mask register.
PASS0_SAR1_CH22_INTR_MASKED
0x40901D9C FULL Interrupt masked request register
PASS0_SAR1_CH22_WORK
0x40901DA0 FULL Working data register
PASS0_SAR1_CH22_RESULT
0x40901DA4 FULL Result data register
PASS0_SAR1_CH22_GRP_STAT
0x40901DA8 FULL Group status register
PASS0_SAR1_CH22_ENABLE
0x40901DB8 FULL Enable register
PASS0_SAR1_CH22_TR_CMD
0x40901DBC FULL Software triggers
19.2.24 CH 23
Register Name Address Permission Description
PASS0_SAR1_CH23_TR_CTL
0x40901DC0 FULL Trigger control.
PASS0_SAR1_CH23_SAMPLE_CTL
0x40901DC4 FULL Sample control.
PASS0_SAR1_CH23_POST_CTL
0x40901DC8 FULL Post processing control
PASS0_SAR1_CH23_RANGE_CTL
0x40901DCC FULL Range thresholds
PASS0_SAR1_CH23_INTR
0x40901DD0 FULL Interrupt request register.
PASS0_SAR1_CH23_INTR_SET
0x40901DD4 FULL Interrupt set request register
PASS0_SAR1_CH23_INTR_MASK
0x40901DD8 FULL Interrupt mask register.
PASS0_SAR1_CH23_INTR_MASKED
0x40901DDC FULL Interrupt masked request register
PASS0_SAR1_CH23_WORK
0x40901DE0 FULL Working data register
PASS0_SAR1_CH23_RESULT
0x40901DE4 FULL Result data register
PASS0_SAR1_CH23_GRP_STAT
0x40901DE8 FULL Group status register
PASS0_SAR1_CH23_ENABLE
0x40901DF8 FULL Enable register
PASS0_SAR1_CH23_TR_CMD
0x40901DFC FULL Software triggers
19.2.25 CH 24
Register Name Address Permission Description
PASS0_SAR1_CH24_TR_CTL
0x40901E00 FULL Trigger control.
PASS0_SAR1_CH24_SAMPLE_CTL
0x40901E04 FULL Sample control.
PASS0_SAR1_CH24_POST_CTL
0x40901E08 FULL Post processing control
1083
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers