Technical Reference Manual 002-29852 Rev. *B
2.3.9.6.39 CANFD_CH_TXBCR
Description:
Tx Buffer Cancellation Request
Address:
0x405200D4
Offset:
0xD4
Retention:
Retained
IsDeepSleep:
No
Comment:
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name CR [7:0]
Bits 15 14 13 12 11 10 9 8
Name CR [15:8]
Bits 23 22 21 20 19 18 17 16
Name CR [23:16]
Bits 31 30 29 28 27 26 25 24
Name CR [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:31 CR RW R 0 Cancellation Request
Each Tx Buffer has its own Cancellation Request bit.
Writing a '1' will set the corresponding
Cancellation Request bit; writing a '0' has no impact.
This enables the Host to set cancellation
requests for multiple Tx Buffers with one write to
TXBCR. TXBCR bits are set only for those Tx
Buffers configured via TXBC. The bits remain set until
the corresponding bit of TXBRP is reset.
0= No cancellation pending
1= Cancellation pending
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers
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