Technical Reference Manual 002-29852 Rev. *B
Register Name Address Permission Description
DW1_CH_STRUCT7_INTR_SET
0x402981D4 FULL Interrupt set
DW1_CH_STRUCT7_INTR_MASK
0x402981D8 FULL Interrupt mask
DW1_CH_STRUCT7_INTR_MASKED
0x402981DC FULL Interrupt masked
DW1_CH_STRUCT7_SRAM_DATA0
0x402981E0 FULL SRAM data 0
DW1_CH_STRUCT7_SRAM_DATA1
0x402981E4 FULL SRAM data 1
DW1_CH_STRUCT7_TR_CMD
0x402981E8 FULL Channel software trigger
9.2.1.9 CH_STRUCT 8
Register Name Address Permission Description
DW1_CH_STRUCT8_CH_CTL
0x40298200 FULL Channel control
DW1_CH_STRUCT8_CH_STATUS
0x40298204 FULL Channel status
DW1_CH_STRUCT8_CH_IDX
0x40298208 FULL Channel current indices
DW1_CH_STRUCT8_CH_CURR_PTR
0x4029820C FULL Channel current descriptor pointer
DW1_CH_STRUCT8_INTR
0x40298210 FULL Interrupt
DW1_CH_STRUCT8_INTR_SET
0x40298214 FULL Interrupt set
DW1_CH_STRUCT8_INTR_MASK
0x40298218 FULL Interrupt mask
DW1_CH_STRUCT8_INTR_MASKED
0x4029821C FULL Interrupt masked
DW1_CH_STRUCT8_SRAM_DATA0
0x40298220 FULL SRAM data 0
DW1_CH_STRUCT8_SRAM_DATA1
0x40298224 FULL SRAM data 1
DW1_CH_STRUCT8_TR_CMD
0x40298228 FULL Channel software trigger
9.2.1.10 CH_STRUCT 9
Register Name Address Permission Description
DW1_CH_STRUCT9_CH_CTL
0x40298240 FULL Channel control
DW1_CH_STRUCT9_CH_STATUS
0x40298244 FULL Channel status
DW1_CH_STRUCT9_CH_IDX
0x40298248 FULL Channel current indices
DW1_CH_STRUCT9_CH_CURR_PTR
0x4029824C FULL Channel current descriptor pointer
DW1_CH_STRUCT9_INTR
0x40298250 FULL Interrupt
DW1_CH_STRUCT9_INTR_SET
0x40298254 FULL Interrupt set
DW1_CH_STRUCT9_INTR_MASK
0x40298258 FULL Interrupt mask
DW1_CH_STRUCT9_INTR_MASKED
0x4029825C FULL Interrupt masked
DW1_CH_STRUCT9_SRAM_DATA0
0x40298260 FULL SRAM data 0
DW1_CH_STRUCT9_SRAM_DATA1
0x40298264 FULL SRAM data 1
DW1_CH_STRUCT9_TR_CMD
0x40298268 FULL Channel software trigger
9.2.1.11 CH_STRUCT 10
Register Name Address Permission Description
DW1_CH_STRUCT10_CH_CTL
0x40298280 FULL Channel control
DW1_CH_STRUCT10_CH_STATUS
0x40298284 FULL Channel status
DW1_CH_STRUCT10_CH_IDX
0x40298288 FULL Channel current indices
DW1_CH_STRUCT10_CH_CURR_PTR
0x4029828C FULL Channel current descriptor pointer
DW1_CH_STRUCT10_INTR
0x40298290 FULL Interrupt
DW1_CH_STRUCT10_INTR_SET
0x40298294 FULL Interrupt set
DW1_CH_STRUCT10_INTR_MASK
0x40298298 FULL Interrupt mask
DW1_CH_STRUCT10_INTR_MASKED
0x4029829C FULL Interrupt masked
DW1_CH_STRUCT10_SRAM_DATA0
0x402982A0 FULL SRAM data 0
DW1_CH_STRUCT10_SRAM_DATA1
0x402982A4 FULL SRAM data 1
DW1_CH_STRUCT10_TR_CMD
0x402982A8 FULL Channel software trigger
9.2.1.12 CH_STRUCT 11
Register Name Address Permission Description
DW1_CH_STRUCT11_CH_CTL
0x402982C0 FULL Channel control
DW1_CH_STRUCT11_CH_STATUS
0x402982C4 FULL Channel status
DW1_CH_STRUCT11_CH_IDX
0x402982C8 FULL Channel current indices
DW1_CH_STRUCT11_CH_CURR_PTR
0x402982CC FULL Channel current descriptor pointer
DW1_CH_STRUCT11_INTR
0x402982D0 FULL Interrupt
DW1_CH_STRUCT11_INTR_SET
0x402982D4 FULL Interrupt set
DW1_CH_STRUCT11_INTR_MASK
0x402982D8 FULL Interrupt mask
DW1_CH_STRUCT11_INTR_MASKED
0x402982DC FULL Interrupt masked
DW1_CH_STRUCT11_SRAM_DATA0
0x402982E0 FULL SRAM data 0
DW1_CH_STRUCT11_SRAM_DATA1
0x402982E4 FULL SRAM data 1
DW1_CH_STRUCT11_TR_CMD
0x402982E8 FULL Channel software trigger
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers