Infineon TRAVEO T2G - 2 CANFD; 2.1 CANFD 0; 2.1.1 CH 0; 2.1.1.1 M_TTCAN

Technical Reference Manual 002-29852 Rev. *B
2 CANFD
2.1 CANFD 0
Description
CAN Controller
Base Address
0x40520000
Size
0x20000
Slave Num
MMIO5 - 2
Register Name
Address Permission Description
CANFD0_CTL
0x40521000 FULL Global CAN control register
CANFD0_STATUS
0x40521004 FULL Global CAN status register
CANFD0_INTR0_CAUSE
0x40521010 FULL Consolidated interrupt0 cause register
CANFD0_INTR1_CAUSE
0x40521014 FULL Consolidated interrupt1 cause register
CANFD0_TS_CTL
0x40521020 FULL Time Stamp control register
CANFD0_TS_CNT
0x40521024 FULL Time Stamp counter value
CANFD0_ECC_CTL
0x40521080 FULL ECC control
CANFD0_ECC_ERR_INJ
0x40521084 FULL ECC error injection
2.1.1 CH 0
Register Name Address Permission Description
CANFD0_CH0_RXFTOP_CTL
0x40520180 FULL Receive FIFO Top control
CANFD0_CH0_RXFTOP0_STAT
0x405201A0 FULL Receive FIFO 0 Top Status
CANFD0_CH0_RXFTOP0_DATA
0x405201A8 FULL Receive FIFO 0 Top Data
CANFD0_CH0_RXFTOP1_STAT
0x405201B0 FULL Receive FIFO 1 Top Status
CANFD0_CH0_RXFTOP1_DATA
0x405201B8 FULL Receive FIFO 1 Top Data
2.1.1.1 M_TTCAN
Register Name Address Permission Description
CANFD0_CH0_CREL
0x40520000 FULL Core Release Register
CANFD0_CH0_ENDN
0x40520004 FULL Endian Register
CANFD0_CH0_DBTP
0x4052000C FULL Data Bit Timing & Prescaler Register
CANFD0_CH0_TEST
0x40520010 FULL Test Register
CANFD0_CH0_RWD
0x40520014 FULL RAM Watchdog
CANFD0_CH0_CCCR
0x40520018 FULL CC Control Register
CANFD0_CH0_NBTP
0x4052001C FULL Nominal Bit Timing & Prescaler Register
CANFD0_CH0_TSCC
0x40520020 FULL Timestamp Counter Configuration
CANFD0_CH0_TSCV
0x40520024 FULL Timestamp Counter Value
CANFD0_CH0_TOCC
0x40520028 FULL Timeout Counter Configuration
CANFD0_CH0_TOCV
0x4052002C FULL Timeout Counter Value
CANFD0_CH0_ECR
0x40520040 FULL Error Counter Register
CANFD0_CH0_PSR
0x40520044 FULL Protocol Status Register
CANFD0_CH0_TDCR
0x40520048 FULL Transmitter Delay Compensation Register
CANFD0_CH0_IR
0x40520050 FULL Interrupt Register
CANFD0_CH0_IE
0x40520054 FULL Interrupt Enable
CANFD0_CH0_ILS
0x40520058 FULL Interrupt Line Select
CANFD0_CH0_ILE
0x4052005C FULL Interrupt Line Enable
CANFD0_CH0_GFC
0x40520080 FULL Global Filter Configuration
CANFD0_CH0_SIDFC
0x40520084 FULL Standard ID Filter Configuration
CANFD0_CH0_XIDFC
0x40520088 FULL Extended ID Filter Configuration
CANFD0_CH0_XIDAM
0x40520090 FULL Extended ID AND Mask
CANFD0_CH0_HPMS
0x40520094 FULL High Priority Message Status
CANFD0_CH0_NDAT1
0x40520098 FULL New Data 1
CANFD0_CH0_NDAT2
0x4052009C FULL New Data 2
CANFD0_CH0_RXF0C
0x405200A0 FULL Rx FIFO 0 Configuration
CANFD0_CH0_RXF0S
0x405200A4 FULL Rx FIFO 0 Status
CANFD0_CH0_RXF0A
0x405200A8 FULL Rx FIFO 0 Acknowledge
CANFD0_CH0_RXBC
0x405200AC FULL Rx Buffer Configuration
CANFD0_CH0_RXF1C
0x405200B0 FULL Rx FIFO 1 Configuration
CANFD0_CH0_RXF1S
0x405200B4 FULL Rx FIFO 1 Status
CANFD0_CH0_RXF1A
0x405200B8 FULL Rx FIFO 1 Acknowledge
CANFD0_CH0_RXESC
0x405200BC FULL Rx Buffer / FIFO Element Size Configuration
CANFD0_CH0_TXBC
0x405200C0 FULL Tx Buffer Configuration
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2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers