Infineon TRAVEO T2G - 2.3.9.2 CANFD_CH_RXFTOP0_STAT

Technical Reference Manual 002-29852 Rev. *B
2.3.9.2 CANFD_CH_RXFTOP0_STAT
Description:
Receive FIFO 0 Top Status
Address:
0x405201A0
Offset:
0x1A0
Retention:
Retained
IsDeepSleep:
No
Comment:
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name F0TA [7:0]
Bits 15 14 13 12 11 10 9 8
Name F0TA [15:8]
Bits 23 22 21 20 19 18 17 16
Name None [23:16]
Bits 31 30 29 28 27 26 25 24
Name None [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:15 F0TA R RW 0 Current FIFO 0 Top Address.
This is a pointer to the next word in the message buffer
defined by the FIFO Start Address (FnSA), Get Index
(FnGI), the FIFO message size (FnDS) and the
message word counter (FnMWC)
FnTA = FnSA + FnGI * msg_size[FnDS] + FnMWC
45
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers