Technical Reference Manual 002-29852 Rev. *B
3.8.7 MTB
3.8.7.1 CM0P_MTB_POSITION
Description:
POSITION register
Address:
0xF0003000
Offset:
0x0
Retention:
Retained
IsDeepSleep:
No
Comment:
Contains the trace write pointer and the wrap bit. Available in all MTB configurations. You can
modify all fields by software. Automatic hardware mechanisms update all fields. A debug
agent might use the WRAP bit to determine whether the trace information above and
below the pointer address is valid.
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name WRAP [2:2] None [1:0]
Bits 15 14 13 12 11 10 9 8
Name POINTER [15:8]
Bits 23 22 21 20 19 18 17 16
Name POINTER [23:16]
Bits 31 30 29 28 27 26 25 24
Name POINTER [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
2 WRAP RW RW X This bit is set to 1 automatically when the POINTER
value wraps as determined by the
MASTER.MASK field in the MASTER Trace Control
Register.
3:31 POINTER RW RW X Trace packet location pointer. Because a packet
consists of two words, the POINTER field is the
location of the first word of a packet. This field contains
bits [31:3] of the address, in the SRAM, where the next
trace packet will be written. The field points to an
unused location and is automatically incremented.
A debug agent can calculate the system address, on
the AHB-Lite bus, of the SRAM location pointed to by
the POSITION register using the following equation:
system address = BASE + ((P + (2^AWIDTH - (BASE
MOD 2^AWIDTH))) MOD 2^AWIDTH).
Where P = POSITION AND 0xFFFF_FFF8.
Where BASE is the BASE register value.
Note:
- The size of the SRAM is parameterized and the most
significant bits of the POINTER field can be RAZ/WI,
depending on the AWIDTH parameter value.
- POSITION register bits greater than or equal to
AWIDTH are RAZ/WI, therefore, the
active POINTER field bits are [AWIDTH-4:0].
- The POINTER field value is relative to the base
address of the SRAM in the system
memory map.
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers
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