Technical Reference Manual 002-29852 Rev. *B
Register Name Address Permission Description
DW0_CH_STRUCT38_CH_CURR_PTR
0x4028898C FULL Channel current descriptor pointer
DW0_CH_STRUCT38_INTR
0x40288990 FULL Interrupt
DW0_CH_STRUCT38_INTR_SET
0x40288994 FULL Interrupt set
DW0_CH_STRUCT38_INTR_MASK
0x40288998 FULL Interrupt mask
DW0_CH_STRUCT38_INTR_MASKED
0x4028899C FULL Interrupt masked
DW0_CH_STRUCT38_SRAM_DATA0
0x402889A0 FULL SRAM data 0
DW0_CH_STRUCT38_SRAM_DATA1
0x402889A4 FULL SRAM data 1
DW0_CH_STRUCT38_TR_CMD
0x402889A8 FULL Channel software trigger
9.1.1.40 CH_STRUCT 39
Register Name Address Permission Description
DW0_CH_STRUCT39_CH_CTL
0x402889C0 FULL Channel control
DW0_CH_STRUCT39_CH_STATUS
0x402889C4 FULL Channel status
DW0_CH_STRUCT39_CH_IDX
0x402889C8 FULL Channel current indices
DW0_CH_STRUCT39_CH_CURR_PTR
0x402889CC FULL Channel current descriptor pointer
DW0_CH_STRUCT39_INTR
0x402889D0 FULL Interrupt
DW0_CH_STRUCT39_INTR_SET
0x402889D4 FULL Interrupt set
DW0_CH_STRUCT39_INTR_MASK
0x402889D8 FULL Interrupt mask
DW0_CH_STRUCT39_INTR_MASKED
0x402889DC FULL Interrupt masked
DW0_CH_STRUCT39_SRAM_DATA0
0x402889E0 FULL SRAM data 0
DW0_CH_STRUCT39_SRAM_DATA1
0x402889E4 FULL SRAM data 1
DW0_CH_STRUCT39_TR_CMD
0x402889E8 FULL Channel software trigger
9.1.1.41 CH_STRUCT 40
Register Name Address Permission Description
DW0_CH_STRUCT40_CH_CTL
0x40288A00 FULL Channel control
DW0_CH_STRUCT40_CH_STATUS
0x40288A04 FULL Channel status
DW0_CH_STRUCT40_CH_IDX
0x40288A08 FULL Channel current indices
DW0_CH_STRUCT40_CH_CURR_PTR
0x40288A0C FULL Channel current descriptor pointer
DW0_CH_STRUCT40_INTR
0x40288A10 FULL Interrupt
DW0_CH_STRUCT40_INTR_SET
0x40288A14 FULL Interrupt set
DW0_CH_STRUCT40_INTR_MASK
0x40288A18 FULL Interrupt mask
DW0_CH_STRUCT40_INTR_MASKED
0x40288A1C FULL Interrupt masked
DW0_CH_STRUCT40_SRAM_DATA0
0x40288A20 FULL SRAM data 0
DW0_CH_STRUCT40_SRAM_DATA1
0x40288A24 FULL SRAM data 1
DW0_CH_STRUCT40_TR_CMD
0x40288A28 FULL Channel software trigger
9.1.1.42 CH_STRUCT 41
Register Name Address Permission Description
DW0_CH_STRUCT41_CH_CTL
0x40288A40 FULL Channel control
DW0_CH_STRUCT41_CH_STATUS
0x40288A44 FULL Channel status
DW0_CH_STRUCT41_CH_IDX
0x40288A48 FULL Channel current indices
DW0_CH_STRUCT41_CH_CURR_PTR
0x40288A4C FULL Channel current descriptor pointer
DW0_CH_STRUCT41_INTR
0x40288A50 FULL Interrupt
DW0_CH_STRUCT41_INTR_SET
0x40288A54 FULL Interrupt set
DW0_CH_STRUCT41_INTR_MASK
0x40288A58 FULL Interrupt mask
DW0_CH_STRUCT41_INTR_MASKED
0x40288A5C FULL Interrupt masked
DW0_CH_STRUCT41_SRAM_DATA0
0x40288A60 FULL SRAM data 0
DW0_CH_STRUCT41_SRAM_DATA1
0x40288A64 FULL SRAM data 1
DW0_CH_STRUCT41_TR_CMD
0x40288A68 FULL Channel software trigger
9.1.1.43 CH_STRUCT 42
Register Name Address Permission Description
DW0_CH_STRUCT42_CH_CTL
0x40288A80 FULL Channel control
DW0_CH_STRUCT42_CH_STATUS
0x40288A84 FULL Channel status
DW0_CH_STRUCT42_CH_IDX
0x40288A88 FULL Channel current indices
DW0_CH_STRUCT42_CH_CURR_PTR
0x40288A8C FULL Channel current descriptor pointer
DW0_CH_STRUCT42_INTR
0x40288A90 FULL Interrupt
DW0_CH_STRUCT42_INTR_SET
0x40288A94 FULL Interrupt set
DW0_CH_STRUCT42_INTR_MASK
0x40288A98 FULL Interrupt mask
DW0_CH_STRUCT42_INTR_MASKED
0x40288A9C FULL Interrupt masked
DW0_CH_STRUCT42_SRAM_DATA0
0x40288AA0 FULL SRAM data 0
DW0_CH_STRUCT42_SRAM_DATA1
0x40288AA4 FULL SRAM data 1
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers