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Infineon TRAVEO T2G - 26.8.21 CLK_ROOT_SELECT

Infineon TRAVEO T2G
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Technical Reference Manual 002-29852 Rev. *B
26.8.21 CLK_ROOT_SELECT
Description:
Clock Root Select Register
Address:
0x40261240
Offset:
0x1240
Retention:
Retained
IsDeepSleep:
Yes
Comment:
Selects a root for a HF clock tree and DSI input. There is a copy of this register for each clock
root.
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name None [7:6] ROOT_DIV [5:4] ROOT_MUX [3:0]
Bits 15 14 13 12 11 10 9 8
Name None [15:9] DIRECT
_MUX [8:8]
Bits 23 22 21 20 19 18 17 16
Name None [23:16]
Bits 31 30 29 28 27 26 25 24
Name ENABLE
[31:31]
None [30:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:3 ROOT_MUX RW R 0 Selects a clock path as the root of HFCLK<k> and for
SRSS DSI input <k>. Use CLK_PATH_SELECT[i] to
configure the desired path. Some paths may have FLL
or PLL available (product-specific), and the control and
bypass mux selections of these are in other registers.
Configure the FLL using CLK_FLL_CONFIG register.
Configure a PLL using the related
CLK_PLL_CONFIG[k] register. Note that not all
products support all clock sources. Selecting a clock
source that is not supported will result in undefined
behavior. It takes four cycles of the originally selected
clock to switch away from it. Do not disable the original
clock during this time.
PATH0 0 Select PATH0 (can be configured for FLL)
PATH1 1 Select PATH1 (can be configured for PLL0, if available
in the product)
PATH2 2 Select PATH2 (can be configured for PLL1, if available
in the product)
PATH3 3 Select PATH3 (can be configured for PLL2, if available
in the product)
PATH4 4 Select PATH4 (can be configured for PLL3, if available
in the product)
PATH5 5 Select PATH5 (can be configured for PLL4, if available
in the product)
PATH6 6 Select PATH6 (can be configured for PLL5, if available
in the product)
PATH7 7 Select PATH7 (can be configured for PLL6, if available
in the product)
PATH8 8 Select PATH8 (can be configured for PLL7, if available
in the product)
PATH9 9 Select PATH9 (can be configured for PLL8, if available
in the product)
1658
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers

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