Technical Reference Manual 002-29852 Rev. *B
28.4.1.1.8 TCPWM_GRP_CNT_PERIOD
Description:
Counter period register
Address:
0x40380020
Offset:
0x20
Retention:
Retained
IsDeepSleep:
No
Comment:
Default:
0xFFFFFFFF
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name PERIOD [7:0]
Bits 15 14 13 12 11 10 9 8
Name PERIOD [15:8]
Bits 23 22 21 20 19 18 17 16
Name PERIOD [23:16]
Bits 31 30 29 28 27 26 25 24
Name PERIOD [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:31 PERIOD RW RW 429496729
5
Period value: upper value of the counter. When the
counter should count for n cycles, this field should be
set to n-1.
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers