Technical Reference Manual 002-29852 Rev. *B
Register Name Address Permission Description
DW0_CH_STRUCT65_CH_CURR_PTR
0x4028904C FULL Channel current descriptor pointer
DW0_CH_STRUCT65_INTR
0x40289050 FULL Interrupt
DW0_CH_STRUCT65_INTR_SET
0x40289054 FULL Interrupt set
DW0_CH_STRUCT65_INTR_MASK
0x40289058 FULL Interrupt mask
DW0_CH_STRUCT65_INTR_MASKED
0x4028905C FULL Interrupt masked
DW0_CH_STRUCT65_SRAM_DATA0
0x40289060 FULL SRAM data 0
DW0_CH_STRUCT65_SRAM_DATA1
0x40289064 FULL SRAM data 1
DW0_CH_STRUCT65_TR_CMD
0x40289068 FULL Channel software trigger
9.1.1.67 CH_STRUCT 66
Register Name Address Permission Description
DW0_CH_STRUCT66_CH_CTL
0x40289080 FULL Channel control
DW0_CH_STRUCT66_CH_STATUS
0x40289084 FULL Channel status
DW0_CH_STRUCT66_CH_IDX
0x40289088 FULL Channel current indices
DW0_CH_STRUCT66_CH_CURR_PTR
0x4028908C FULL Channel current descriptor pointer
DW0_CH_STRUCT66_INTR
0x40289090 FULL Interrupt
DW0_CH_STRUCT66_INTR_SET
0x40289094 FULL Interrupt set
DW0_CH_STRUCT66_INTR_MASK
0x40289098 FULL Interrupt mask
DW0_CH_STRUCT66_INTR_MASKED
0x4028909C FULL Interrupt masked
DW0_CH_STRUCT66_SRAM_DATA0
0x402890A0 FULL SRAM data 0
DW0_CH_STRUCT66_SRAM_DATA1
0x402890A4 FULL SRAM data 1
DW0_CH_STRUCT66_TR_CMD
0x402890A8 FULL Channel software trigger
9.1.1.68 CH_STRUCT 67
Register Name Address Permission Description
DW0_CH_STRUCT67_CH_CTL
0x402890C0 FULL Channel control
DW0_CH_STRUCT67_CH_STATUS
0x402890C4 FULL Channel status
DW0_CH_STRUCT67_CH_IDX
0x402890C8 FULL Channel current indices
DW0_CH_STRUCT67_CH_CURR_PTR
0x402890CC FULL Channel current descriptor pointer
DW0_CH_STRUCT67_INTR
0x402890D0 FULL Interrupt
DW0_CH_STRUCT67_INTR_SET
0x402890D4 FULL Interrupt set
DW0_CH_STRUCT67_INTR_MASK
0x402890D8 FULL Interrupt mask
DW0_CH_STRUCT67_INTR_MASKED
0x402890DC FULL Interrupt masked
DW0_CH_STRUCT67_SRAM_DATA0
0x402890E0 FULL SRAM data 0
DW0_CH_STRUCT67_SRAM_DATA1
0x402890E4 FULL SRAM data 1
DW0_CH_STRUCT67_TR_CMD
0x402890E8 FULL Channel software trigger
9.1.1.69 CH_STRUCT 68
Register Name Address Permission Description
DW0_CH_STRUCT68_CH_CTL
0x40289100 FULL Channel control
DW0_CH_STRUCT68_CH_STATUS
0x40289104 FULL Channel status
DW0_CH_STRUCT68_CH_IDX
0x40289108 FULL Channel current indices
DW0_CH_STRUCT68_CH_CURR_PTR
0x4028910C FULL Channel current descriptor pointer
DW0_CH_STRUCT68_INTR
0x40289110 FULL Interrupt
DW0_CH_STRUCT68_INTR_SET
0x40289114 FULL Interrupt set
DW0_CH_STRUCT68_INTR_MASK
0x40289118 FULL Interrupt mask
DW0_CH_STRUCT68_INTR_MASKED
0x4028911C FULL Interrupt masked
DW0_CH_STRUCT68_SRAM_DATA0
0x40289120 FULL SRAM data 0
DW0_CH_STRUCT68_SRAM_DATA1
0x40289124 FULL SRAM data 1
DW0_CH_STRUCT68_TR_CMD
0x40289128 FULL Channel software trigger
9.1.1.70 CH_STRUCT 69
Register Name Address Permission Description
DW0_CH_STRUCT69_CH_CTL
0x40289140 FULL Channel control
DW0_CH_STRUCT69_CH_STATUS
0x40289144 FULL Channel status
DW0_CH_STRUCT69_CH_IDX
0x40289148 FULL Channel current indices
DW0_CH_STRUCT69_CH_CURR_PTR
0x4028914C FULL Channel current descriptor pointer
DW0_CH_STRUCT69_INTR
0x40289150 FULL Interrupt
DW0_CH_STRUCT69_INTR_SET
0x40289154 FULL Interrupt set
DW0_CH_STRUCT69_INTR_MASK
0x40289158 FULL Interrupt mask
DW0_CH_STRUCT69_INTR_MASKED
0x4028915C FULL Interrupt masked
DW0_CH_STRUCT69_SRAM_DATA0
0x40289160 FULL SRAM data 0
DW0_CH_STRUCT69_SRAM_DATA1
0x40289164 FULL SRAM data 1
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers