Infineon TRAVEO T2G - 19.1.4 CH 3; 19.1.5 CH 4; 19.1.6 CH 5; 19.1.7 CH 6

Technical Reference Manual 002-29852 Rev. *B
Register Name Address Permission Description
PASS0_SAR0_CH2_TR_CTL
0x40900880 FULL Trigger control.
PASS0_SAR0_CH2_SAMPLE_CTL
0x40900884 FULL Sample control.
PASS0_SAR0_CH2_POST_CTL
0x40900888 FULL Post processing control
PASS0_SAR0_CH2_RANGE_CTL
0x4090088C FULL Range thresholds
PASS0_SAR0_CH2_INTR
0x40900890 FULL Interrupt request register.
PASS0_SAR0_CH2_INTR_SET
0x40900894 FULL Interrupt set request register
PASS0_SAR0_CH2_INTR_MASK
0x40900898 FULL Interrupt mask register.
PASS0_SAR0_CH2_INTR_MASKED
0x4090089C FULL Interrupt masked request register
PASS0_SAR0_CH2_WORK
0x409008A0 FULL Working data register
PASS0_SAR0_CH2_RESULT
0x409008A4 FULL Result data register
PASS0_SAR0_CH2_GRP_STAT
0x409008A8 FULL Group status register
PASS0_SAR0_CH2_ENABLE
0x409008B8 FULL Enable register
PASS0_SAR0_CH2_TR_CMD
0x409008BC FULL Software triggers
19.1.4 CH 3
Register Name Address Permission Description
PASS0_SAR0_CH3_TR_CTL
0x409008C0 FULL Trigger control.
PASS0_SAR0_CH3_SAMPLE_CTL
0x409008C4 FULL Sample control.
PASS0_SAR0_CH3_POST_CTL
0x409008C8 FULL Post processing control
PASS0_SAR0_CH3_RANGE_CTL
0x409008CC FULL Range thresholds
PASS0_SAR0_CH3_INTR
0x409008D0 FULL Interrupt request register.
PASS0_SAR0_CH3_INTR_SET
0x409008D4 FULL Interrupt set request register
PASS0_SAR0_CH3_INTR_MASK
0x409008D8 FULL Interrupt mask register.
PASS0_SAR0_CH3_INTR_MASKED
0x409008DC FULL Interrupt masked request register
PASS0_SAR0_CH3_WORK
0x409008E0 FULL Working data register
PASS0_SAR0_CH3_RESULT
0x409008E4 FULL Result data register
PASS0_SAR0_CH3_GRP_STAT
0x409008E8 FULL Group status register
PASS0_SAR0_CH3_ENABLE
0x409008F8 FULL Enable register
PASS0_SAR0_CH3_TR_CMD
0x409008FC FULL Software triggers
19.1.5 CH 4
Register Name Address Permission Description
PASS0_SAR0_CH4_TR_CTL
0x40900900 FULL Trigger control.
PASS0_SAR0_CH4_SAMPLE_CTL
0x40900904 FULL Sample control.
PASS0_SAR0_CH4_POST_CTL
0x40900908 FULL Post processing control
PASS0_SAR0_CH4_RANGE_CTL
0x4090090C FULL Range thresholds
PASS0_SAR0_CH4_INTR
0x40900910 FULL Interrupt request register.
PASS0_SAR0_CH4_INTR_SET
0x40900914 FULL Interrupt set request register
PASS0_SAR0_CH4_INTR_MASK
0x40900918 FULL Interrupt mask register.
PASS0_SAR0_CH4_INTR_MASKED
0x4090091C FULL Interrupt masked request register
PASS0_SAR0_CH4_WORK
0x40900920 FULL Working data register
PASS0_SAR0_CH4_RESULT
0x40900924 FULL Result data register
PASS0_SAR0_CH4_GRP_STAT
0x40900928 FULL Group status register
PASS0_SAR0_CH4_ENABLE
0x40900938 FULL Enable register
PASS0_SAR0_CH4_TR_CMD
0x4090093C FULL Software triggers
19.1.6 CH 5
Register Name Address Permission Description
PASS0_SAR0_CH5_TR_CTL
0x40900940 FULL Trigger control.
PASS0_SAR0_CH5_SAMPLE_CTL
0x40900944 FULL Sample control.
PASS0_SAR0_CH5_POST_CTL
0x40900948 FULL Post processing control
PASS0_SAR0_CH5_RANGE_CTL
0x4090094C FULL Range thresholds
PASS0_SAR0_CH5_INTR
0x40900950 FULL Interrupt request register.
PASS0_SAR0_CH5_INTR_SET
0x40900954 FULL Interrupt set request register
PASS0_SAR0_CH5_INTR_MASK
0x40900958 FULL Interrupt mask register.
PASS0_SAR0_CH5_INTR_MASKED
0x4090095C FULL Interrupt masked request register
PASS0_SAR0_CH5_WORK
0x40900960 FULL Working data register
PASS0_SAR0_CH5_RESULT
0x40900964 FULL Result data register
PASS0_SAR0_CH5_GRP_STAT
0x40900968 FULL Group status register
PASS0_SAR0_CH5_ENABLE
0x40900978 FULL Enable register
PASS0_SAR0_CH5_TR_CMD
0x4090097C FULL Software triggers
19.1.7 CH 6
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2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers