Infineon TRAVEO T2G - 19.2.18 CH 17; 19.2.19 CH 18; 19.2.20 CH 19; 19.2.21 CH 20

Technical Reference Manual 002-29852 Rev. *B
Register Name Address Permission Description
PASS0_SAR1_CH16_INTR_SET
0x40901C14 FULL Interrupt set request register
PASS0_SAR1_CH16_INTR_MASK
0x40901C18 FULL Interrupt mask register.
PASS0_SAR1_CH16_INTR_MASKED
0x40901C1C FULL Interrupt masked request register
PASS0_SAR1_CH16_WORK
0x40901C20 FULL Working data register
PASS0_SAR1_CH16_RESULT
0x40901C24 FULL Result data register
PASS0_SAR1_CH16_GRP_STAT
0x40901C28 FULL Group status register
PASS0_SAR1_CH16_ENABLE
0x40901C38 FULL Enable register
PASS0_SAR1_CH16_TR_CMD
0x40901C3C FULL Software triggers
19.2.18 CH 17
Register Name Address Permission Description
PASS0_SAR1_CH17_TR_CTL
0x40901C40 FULL Trigger control.
PASS0_SAR1_CH17_SAMPLE_CTL
0x40901C44 FULL Sample control.
PASS0_SAR1_CH17_POST_CTL
0x40901C48 FULL Post processing control
PASS0_SAR1_CH17_RANGE_CTL
0x40901C4C FULL Range thresholds
PASS0_SAR1_CH17_INTR
0x40901C50 FULL Interrupt request register.
PASS0_SAR1_CH17_INTR_SET
0x40901C54 FULL Interrupt set request register
PASS0_SAR1_CH17_INTR_MASK
0x40901C58 FULL Interrupt mask register.
PASS0_SAR1_CH17_INTR_MASKED
0x40901C5C FULL Interrupt masked request register
PASS0_SAR1_CH17_WORK
0x40901C60 FULL Working data register
PASS0_SAR1_CH17_RESULT
0x40901C64 FULL Result data register
PASS0_SAR1_CH17_GRP_STAT
0x40901C68 FULL Group status register
PASS0_SAR1_CH17_ENABLE
0x40901C78 FULL Enable register
PASS0_SAR1_CH17_TR_CMD
0x40901C7C FULL Software triggers
19.2.19 CH 18
Register Name Address Permission Description
PASS0_SAR1_CH18_TR_CTL
0x40901C80 FULL Trigger control.
PASS0_SAR1_CH18_SAMPLE_CTL
0x40901C84 FULL Sample control.
PASS0_SAR1_CH18_POST_CTL
0x40901C88 FULL Post processing control
PASS0_SAR1_CH18_RANGE_CTL
0x40901C8C FULL Range thresholds
PASS0_SAR1_CH18_INTR
0x40901C90 FULL Interrupt request register.
PASS0_SAR1_CH18_INTR_SET
0x40901C94 FULL Interrupt set request register
PASS0_SAR1_CH18_INTR_MASK
0x40901C98 FULL Interrupt mask register.
PASS0_SAR1_CH18_INTR_MASKED
0x40901C9C FULL Interrupt masked request register
PASS0_SAR1_CH18_WORK
0x40901CA0 FULL Working data register
PASS0_SAR1_CH18_RESULT
0x40901CA4 FULL Result data register
PASS0_SAR1_CH18_GRP_STAT
0x40901CA8 FULL Group status register
PASS0_SAR1_CH18_ENABLE
0x40901CB8 FULL Enable register
PASS0_SAR1_CH18_TR_CMD
0x40901CBC FULL Software triggers
19.2.20 CH 19
Register Name Address Permission Description
PASS0_SAR1_CH19_TR_CTL
0x40901CC0 FULL Trigger control.
PASS0_SAR1_CH19_SAMPLE_CTL
0x40901CC4 FULL Sample control.
PASS0_SAR1_CH19_POST_CTL
0x40901CC8 FULL Post processing control
PASS0_SAR1_CH19_RANGE_CTL
0x40901CCC FULL Range thresholds
PASS0_SAR1_CH19_INTR
0x40901CD0 FULL Interrupt request register.
PASS0_SAR1_CH19_INTR_SET
0x40901CD4 FULL Interrupt set request register
PASS0_SAR1_CH19_INTR_MASK
0x40901CD8 FULL Interrupt mask register.
PASS0_SAR1_CH19_INTR_MASKED
0x40901CDC FULL Interrupt masked request register
PASS0_SAR1_CH19_WORK
0x40901CE0 FULL Working data register
PASS0_SAR1_CH19_RESULT
0x40901CE4 FULL Result data register
PASS0_SAR1_CH19_GRP_STAT
0x40901CE8 FULL Group status register
PASS0_SAR1_CH19_ENABLE
0x40901CF8 FULL Enable register
PASS0_SAR1_CH19_TR_CMD
0x40901CFC FULL Software triggers
19.2.21 CH 20
Register Name Address Permission Description
PASS0_SAR1_CH20_TR_CTL
0x40901D00 FULL Trigger control.
PASS0_SAR1_CH20_SAMPLE_CTL
0x40901D04 FULL Sample control.
PASS0_SAR1_CH20_POST_CTL
0x40901D08 FULL Post processing control
PASS0_SAR1_CH20_RANGE_CTL
0x40901D0C FULL Range thresholds
1082
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers