Technical Reference Manual 002-29852 Rev. *B
4.13.6.28 CM4_CM4CTI_DEVID
Description:
Device Configuration Register
Address:
0xE0042FC8
Offset:
0xFC8
Retention:
Retained
IsDeepSleep:
No
Comment:
This register is implementation-defined for each Part Number and Designer. This indicates the
capabilities of the component. The entire 32-bit field can be used because the data width is
determined by the particular component. Unused bits must read as zero.
If the component is configurable then it is recommended that this register reflects any changes
to a standard configuration.
Default:
0x40800
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name None [7:5] NRMUXING [4:0]
Bits 15 14 13 12 11 10 9 8
Name NRTRIG [15:8]
Bits 23 22 21 20 19 18 17 16
Name None [23:20] NRCHAN [19:16]
Bits 31 30 29 28 27 26 25 24
Name None [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:4 NRMUXING R R 0 Indicates the number of multiplexing available on
Trigger Inputs and Trigger Outputs using ASICCTL.
Default value of 5'b00000 indicating no multiplexing
present. Reflects the value of the Verilog `define
EXTMUXNUM that you must alter accordingly.
8:15 NRTRIG R R 8 Number of ECT triggers available.
16:19 NRCHAN R R 4 Number of ECT channels available.
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers
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