Technical Reference Manual 002-29852 Rev. *B
26.8.47.1.2 CSV_REF_CSV_REF_LIMIT
Description:
Clock Supervision Reference Limits
Address:
0x40261714
Offset:
0x4
Retention:
Retained
IsDeepSleep:
No
Comment:
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name LOWER [7:0]
Bits 15 14 13 12 11 10 9 8
Name LOWER [15:8]
Bits 23 22 21 20 19 18 17 16
Name UPPER [23:16]
Bits 31 30 29 28 27 26 25 24
Name UPPER [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:15 LOWER RW R 0 Cycle time lower limit. Set the lower limit -1, in
reference clock cycles, before the next monitored clock
event is allowed to happen. If a monitored clock event
happens before this limit is reached a CSV error is
detected.
LOWER must be at least 1 less than UPPER. In case
the clocks are asynchronous LOWER must be at least
3 less than UPPER.
16:31 UPPER RW R 0 Cycle time upper limit. Set the upper limit -1, in
reference clock cycles, before (or same time) the next
monitored clock event must happen. If a monitored
clock event does not happen before this limit is
reached, or does not happen at all (clock loss), a CSV
error is detected.
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers