Technical Reference Manual 002-29852 Rev. *B
Register Name Address Permission Description
DW0_CH_STRUCT20_CH_CURR_PTR
0x4028850C FULL Channel current descriptor pointer
DW0_CH_STRUCT20_INTR
0x40288510 FULL Interrupt
DW0_CH_STRUCT20_INTR_SET
0x40288514 FULL Interrupt set
DW0_CH_STRUCT20_INTR_MASK
0x40288518 FULL Interrupt mask
DW0_CH_STRUCT20_INTR_MASKED
0x4028851C FULL Interrupt masked
DW0_CH_STRUCT20_SRAM_DATA0
0x40288520 FULL SRAM data 0
DW0_CH_STRUCT20_SRAM_DATA1
0x40288524 FULL SRAM data 1
DW0_CH_STRUCT20_TR_CMD
0x40288528 FULL Channel software trigger
9.1.1.22 CH_STRUCT 21
Register Name Address Permission Description
DW0_CH_STRUCT21_CH_CTL
0x40288540 FULL Channel control
DW0_CH_STRUCT21_CH_STATUS
0x40288544 FULL Channel status
DW0_CH_STRUCT21_CH_IDX
0x40288548 FULL Channel current indices
DW0_CH_STRUCT21_CH_CURR_PTR
0x4028854C FULL Channel current descriptor pointer
DW0_CH_STRUCT21_INTR
0x40288550 FULL Interrupt
DW0_CH_STRUCT21_INTR_SET
0x40288554 FULL Interrupt set
DW0_CH_STRUCT21_INTR_MASK
0x40288558 FULL Interrupt mask
DW0_CH_STRUCT21_INTR_MASKED
0x4028855C FULL Interrupt masked
DW0_CH_STRUCT21_SRAM_DATA0
0x40288560 FULL SRAM data 0
DW0_CH_STRUCT21_SRAM_DATA1
0x40288564 FULL SRAM data 1
DW0_CH_STRUCT21_TR_CMD
0x40288568 FULL Channel software trigger
9.1.1.23 CH_STRUCT 22
Register Name Address Permission Description
DW0_CH_STRUCT22_CH_CTL
0x40288580 FULL Channel control
DW0_CH_STRUCT22_CH_STATUS
0x40288584 FULL Channel status
DW0_CH_STRUCT22_CH_IDX
0x40288588 FULL Channel current indices
DW0_CH_STRUCT22_CH_CURR_PTR
0x4028858C FULL Channel current descriptor pointer
DW0_CH_STRUCT22_INTR
0x40288590 FULL Interrupt
DW0_CH_STRUCT22_INTR_SET
0x40288594 FULL Interrupt set
DW0_CH_STRUCT22_INTR_MASK
0x40288598 FULL Interrupt mask
DW0_CH_STRUCT22_INTR_MASKED
0x4028859C FULL Interrupt masked
DW0_CH_STRUCT22_SRAM_DATA0
0x402885A0 FULL SRAM data 0
DW0_CH_STRUCT22_SRAM_DATA1
0x402885A4 FULL SRAM data 1
DW0_CH_STRUCT22_TR_CMD
0x402885A8 FULL Channel software trigger
9.1.1.24 CH_STRUCT 23
Register Name Address Permission Description
DW0_CH_STRUCT23_CH_CTL
0x402885C0 FULL Channel control
DW0_CH_STRUCT23_CH_STATUS
0x402885C4 FULL Channel status
DW0_CH_STRUCT23_CH_IDX
0x402885C8 FULL Channel current indices
DW0_CH_STRUCT23_CH_CURR_PTR
0x402885CC FULL Channel current descriptor pointer
DW0_CH_STRUCT23_INTR
0x402885D0 FULL Interrupt
DW0_CH_STRUCT23_INTR_SET
0x402885D4 FULL Interrupt set
DW0_CH_STRUCT23_INTR_MASK
0x402885D8 FULL Interrupt mask
DW0_CH_STRUCT23_INTR_MASKED
0x402885DC FULL Interrupt masked
DW0_CH_STRUCT23_SRAM_DATA0
0x402885E0 FULL SRAM data 0
DW0_CH_STRUCT23_SRAM_DATA1
0x402885E4 FULL SRAM data 1
DW0_CH_STRUCT23_TR_CMD
0x402885E8 FULL Channel software trigger
9.1.1.25 CH_STRUCT 24
Register Name Address Permission Description
DW0_CH_STRUCT24_CH_CTL
0x40288600 FULL Channel control
DW0_CH_STRUCT24_CH_STATUS
0x40288604 FULL Channel status
DW0_CH_STRUCT24_CH_IDX
0x40288608 FULL Channel current indices
DW0_CH_STRUCT24_CH_CURR_PTR
0x4028860C FULL Channel current descriptor pointer
DW0_CH_STRUCT24_INTR
0x40288610 FULL Interrupt
DW0_CH_STRUCT24_INTR_SET
0x40288614 FULL Interrupt set
DW0_CH_STRUCT24_INTR_MASK
0x40288618 FULL Interrupt mask
DW0_CH_STRUCT24_INTR_MASKED
0x4028861C FULL Interrupt masked
DW0_CH_STRUCT24_SRAM_DATA0
0x40288620 FULL SRAM data 0
DW0_CH_STRUCT24_SRAM_DATA1
0x40288624 FULL SRAM data 1
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers