Technical Reference Manual 002-29852 Rev. *B
Register Name Address Permission Description
TCPWM0_GRP0_CNT19_CTRL
0x40380980 FULL Counter control register
Note:AUTO_RELOAD_LINE_SEL CC0_MATCH_UP_EN
CC0_MATCH_DOWN_EN CC1_MATCH_UP_EN
CC1_MATCH_DOWN_EN are not available for this
register
TCPWM0_GRP0_CNT19_STATUS
0x40380984 FULL Counter status register
Note:DT_CNT_H is not available for this register
TCPWM0_GRP0_CNT19_COUNTER
0x40380988 FULL Counter count register
TCPWM0_GRP0_CNT19_CC0
0x40380990 FULL Counter compare/capture 0 register
TCPWM0_GRP0_CNT19_CC0_BUFF
0x40380994 FULL Counter buffered compare/capture 0 register
TCPWM0_GRP0_CNT19_CC1
0x40380998 FULL Counter compare/capture 1 register
TCPWM0_GRP0_CNT19_CC1_BUFF
0x4038099C FULL Counter buffered compare/capture 1 register
TCPWM0_GRP0_CNT19_PERIOD
0x403809A0 FULL Counter period register
TCPWM0_GRP0_CNT19_PERIOD_BUFF
0x403809A4 FULL Counter buffered period register
TCPWM0_GRP0_CNT19_DT
0x403809B0 FULL Counter PWM dead time register
Note:DT_LINE_OUT_H DT_LINE_COMPL_OUT are not
available for this register
TCPWM0_GRP0_CNT19_TR_CMD
0x403809C0 FULL Counter trigger command register
TCPWM0_GRP0_CNT19_TR_IN_SEL0
0x403809C4 FULL Counter input trigger selection register 0
TCPWM0_GRP0_CNT19_TR_IN_SEL1
0x403809C8 FULL Counter input trigger selection register 1
TCPWM0_GRP0_CNT19_TR_IN_EDGE_SEL
0x403809CC FULL Counter input trigger edge selection register
TCPWM0_GRP0_CNT19_TR_PWM_CTRL
0x403809D0 FULL Counter trigger PWM control register
TCPWM0_GRP0_CNT19_TR_OUT_SEL
0x403809D4 FULL Counter output trigger selection register
TCPWM0_GRP0_CNT19_INTR
0x403809F0 FULL Interrupt request register
TCPWM0_GRP0_CNT19_INTR_SET
0x403809F4 FULL Interrupt set request register
TCPWM0_GRP0_CNT19_INTR_MASK
0x403809F8 FULL Interrupt mask register
TCPWM0_GRP0_CNT19_INTR_MASKED
0x403809FC FULL Interrupt masked request register
28.1.21 CNT 20
Register Name Address Permission Description
TCPWM0_GRP0_CNT20_CTRL
0x40380A00 FULL Counter control register
Note:AUTO_RELOAD_LINE_SEL CC0_MATCH_UP_EN
CC0_MATCH_DOWN_EN CC1_MATCH_UP_EN
CC1_MATCH_DOWN_EN are not available for this
register
TCPWM0_GRP0_CNT20_STATUS
0x40380A04 FULL Counter status register
Note:DT_CNT_H is not available for this register
TCPWM0_GRP0_CNT20_COUNTER
0x40380A08 FULL Counter count register
TCPWM0_GRP0_CNT20_CC0
0x40380A10 FULL Counter compare/capture 0 register
TCPWM0_GRP0_CNT20_CC0_BUFF
0x40380A14 FULL Counter buffered compare/capture 0 register
TCPWM0_GRP0_CNT20_CC1
0x40380A18 FULL Counter compare/capture 1 register
TCPWM0_GRP0_CNT20_CC1_BUFF
0x40380A1C FULL Counter buffered compare/capture 1 register
TCPWM0_GRP0_CNT20_PERIOD
0x40380A20 FULL Counter period register
TCPWM0_GRP0_CNT20_PERIOD_BUFF
0x40380A24 FULL Counter buffered period register
TCPWM0_GRP0_CNT20_DT
0x40380A30 FULL Counter PWM dead time register
Note:DT_LINE_OUT_H DT_LINE_COMPL_OUT are not
available for this register
TCPWM0_GRP0_CNT20_TR_CMD
0x40380A40 FULL Counter trigger command register
TCPWM0_GRP0_CNT20_TR_IN_SEL0
0x40380A44 FULL Counter input trigger selection register 0
TCPWM0_GRP0_CNT20_TR_IN_SEL1
0x40380A48 FULL Counter input trigger selection register 1
TCPWM0_GRP0_CNT20_TR_IN_EDGE_SEL
0x40380A4C FULL Counter input trigger edge selection register
TCPWM0_GRP0_CNT20_TR_PWM_CTRL
0x40380A50 FULL Counter trigger PWM control register
TCPWM0_GRP0_CNT20_TR_OUT_SEL
0x40380A54 FULL Counter output trigger selection register
TCPWM0_GRP0_CNT20_INTR
0x40380A70 FULL Interrupt request register
TCPWM0_GRP0_CNT20_INTR_SET
0x40380A74 FULL Interrupt set request register
TCPWM0_GRP0_CNT20_INTR_MASK
0x40380A78 FULL Interrupt mask register
TCPWM0_GRP0_CNT20_INTR_MASKED
0x40380A7C FULL Interrupt masked request register
28.1.22 CNT 21
Register Name Address Permission Description
TCPWM0_GRP0_CNT21_CTRL
0x40380A80 FULL Counter control register
Note:AUTO_RELOAD_LINE_SEL CC0_MATCH_UP_EN
CC0_MATCH_DOWN_EN CC1_MATCH_UP_EN
CC1_MATCH_DOWN_EN are not available for this
register
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers
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