Infineon TRAVEO T2G - 23.9.39 SCB_INTR_M_MASK

Technical Reference Manual 002-29852 Rev. *B
23.9.39 SCB_INTR_M_MASK
Description:
Master interrupt mask
Address:
0x40600F08
Offset:
0xF08
Retention:
Retained
IsDeepSleep:
No
Comment:
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name None [7:5] I2C_STOP
[4:4]
None [3:3] I2C_ACK
[2:2]
I2C_NACK
[1:1]
I2C_ARB_L
OST [0:0]
Bits 15 14 13 12 11 10 9 8
Name None [15:10] SPI_DONE
[9:9]
I2C_BUS_E
RROR [8:8]
Bits 23 22 21 20 19 18 17 16
Name None [23:16]
Bits 31 30 29 28 27 26 25 24
Name None [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0 I2C_ARB_LOST RW R 0 Mask bit for corresponding bit in interrupt request
register.
1 I2C_NACK RW R 0 Mask bit for corresponding bit in interrupt request
register.
2 I2C_ACK RW R 0 Mask bit for corresponding bit in interrupt request
register.
4 I2C_STOP RW R 0 Mask bit for corresponding bit in interrupt request
register.
8 I2C_BUS_ERROR RW R 0 Mask bit for corresponding bit in interrupt request
register.
9 SPI_DONE RW R 0 Mask bit for corresponding bit in interrupt request
register.
1437
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers