Technical Reference Manual 002-29852 Rev. *B
4.13.10.24 CM4_ETB_DEVID
Description:
Device ID
Address:
0xE008DFC8
Offset:
0xFC8
Retention:
Retained
IsDeepSleep:
No
Comment:
This register is implementation-defined for each Part Number and Designer. This indicates the
capabilities of the component. The entire 32-bit field can be used because the data width is
determined by the particular component. Unused bits must read as zero.
If the component is configurable then it is recommended that this register reflects any changes
to a standard configuration.
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name None [7:6] RAMCLK
[5:5]
EXTMUXNUM [4:0]
Bits 15 14 13 12 11 10 9 8
Name None [15:8]
Bits 23 22 21 20 19 18 17 16
Name None [23:16]
Bits 31 30 29 28 27 26 25 24
Name None [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:4 EXTMUXNUM R R 0 Number of external multiplexing available. Non-zero
values indicate the type of ATB multiplexing on the
input to the ATB. Only 0x00 is supported, that is, no
multiplexing is present. This value helps detect the
ATB structure.
5 RAMCLK R R 0 This bit returns 0 on reads to indicate that the ETB
RAM operates synchronously to atclk.
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers
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