Technical Reference Manual 002-29852 Rev. *B
26.8.34 CLK_FLL_STATUS
Description:
FLL Status Register
Address:
0x40261540
Offset:
0x1540
Retention:
Retained
IsDeepSleep:
No
Comment:
This register indicates status for the FLL. This register is synchronized during an AHB read
transaction. This causes a number wait-states to be inserted in the transaction depending on
the frequency ratio between system and FLL frequency.
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name None [7:3] CCO
_READY
[2:2]
UNLOCK
_OC
CURRED
[1:1]
LOCKED
[0:0]
Bits 15 14 13 12 11 10 9 8
Name None [15:8]
Bits 23 22 21 20 19 18 17 16
Name None [23:16]
Bits 31 30 29 28 27 26 25 24
Name None [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0 LOCKED R W 0 FLL Lock Indicator
1 UNLOCK_OCCURRED RW1C A 0 This bit sets whenever the FLL is enabled and goes
out of lock. This bit stays set until cleared by firmware.
2 CCO_READY R RW 0 This indicates that the CCO is internally settled and
ready to use.
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers