Infineon TRAVEO T2G - 23.9.12 SCB_UART_RX_STATUS

Technical Reference Manual 002-29852 Rev. *B
23.9.12 SCB_UART_RX_STATUS
Description:
UART receiver status
Address:
0x4060004C
Offset:
0x4C
Retention:
Not Retained
IsDeepSleep:
No
Comment:
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name BR_COUNTER [7:0]
Bits 15 14 13 12 11 10 9 8
Name None [15:12] BR_COUNTER [11:8]
Bits 23 22 21 20 19 18 17 16
Name None [23:16]
Bits 31 30 29 28 27 26 25 24
Name None [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:11 BR_COUNTER R W Undefined Amount of SCB clock periods that constitute the
transmission of a 0x55 data frame (sent least
significant bit first) as determined by the receiver.
BR_COUNTER / 8 is the amount of SCB clock periods
that constitute a bit period. This field has valid data
when INTR_RX.BAUD_DETECT is set to '1'.
1403
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers