Infineon TRAVEO T2G - 2.3.9.6.14 CANFD_CH_TDCR

Technical Reference Manual 002-29852 Rev. *B
2.3.9.6.14 CANFD_CH_TDCR
Description:
Transmitter Delay Compensation Register
Address:
0x40520048
Offset:
0x48
Retention:
Retained
IsDeepSleep:
No
Comment:
Protected Write.
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name None [7:7] TDCF [6:0]
Bits 15 14 13 12 11 10 9 8
Name None
[15:15]
TDCO [14:8]
Bits 23 22 21 20 19 18 17 16
Name None [23:16]
Bits 31 30 29 28 27 26 25 24
Name None [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:6 TDCF RW R 0 Transmitter Delay Compensation Filter Window Length
0x00-0x7F Defines the minimum value for the SSP
position, dominant edges on m_ttcan_rx
that would result in an earlier SSP position are ignored
for transmitter delay measurement.
The feature is enabled when TDCF is configured to a
value greater than
TDCO. Valid values are 0 to 127 mtq
8:14 TDCO RW R 0 Transmitter Delay Compensation Offset
0x00-0x7F Offset value defining the distance between
the measured delay from m_ttcan_tx to
m_ttcan_rx and the secondary sample point. Valid
values are 0 to 127 mtq.
65
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers