Infineon TRAVEO T2G - 2.1.2 CH 1; 2.1.2.1 M_TTCAN

Technical Reference Manual 002-29852 Rev. *B
Register Name Address Permission Description
CANFD0_CH0_TXFQS
0x405200C4 FULL Tx FIFO/Queue Status
CANFD0_CH0_TXESC
0x405200C8 FULL Tx Buffer Element Size Configuration
CANFD0_CH0_TXBRP
0x405200CC FULL Tx Buffer Request Pending
CANFD0_CH0_TXBAR
0x405200D0 FULL Tx Buffer Add Request
CANFD0_CH0_TXBCR
0x405200D4 FULL Tx Buffer Cancellation Request
CANFD0_CH0_TXBTO
0x405200D8 FULL Tx Buffer Transmission Occurred
CANFD0_CH0_TXBCF
0x405200DC FULL Tx Buffer Cancellation Finished
CANFD0_CH0_TXBTIE
0x405200E0 FULL Tx Buffer Transmission Interrupt Enable
CANFD0_CH0_TXBCIE
0x405200E4 FULL Tx Buffer Cancellation Finished Interrupt Enable
CANFD0_CH0_TXEFC
0x405200F0 FULL Tx Event FIFO Configuration
CANFD0_CH0_TXEFS
0x405200F4 FULL Tx Event FIFO Status
CANFD0_CH0_TXEFA
0x405200F8 FULL Tx Event FIFO Acknowledge
CANFD0_CH0_TTTMC
0x40520100 FULL TT Trigger Memory Configuration
CANFD0_CH0_TTRMC
0x40520104 FULL TT Reference Message Configuration
CANFD0_CH0_TTOCF
0x40520108 FULL TT Operation Configuration
CANFD0_CH0_TTMLM
0x4052010C FULL TT Matrix Limits
CANFD0_CH0_TURCF
0x40520110 FULL TUR Configuration
CANFD0_CH0_TTOCN
0x40520114 FULL TT Operation Control
CANFD0_CH0_TTGTP
0x40520118 FULL TT Global Time Preset
CANFD0_CH0_TTTMK
0x4052011C FULL TT Time Mark
CANFD0_CH0_TTIR
0x40520120 FULL TT Interrupt Register
CANFD0_CH0_TTIE
0x40520124 FULL TT Interrupt Enable
CANFD0_CH0_TTILS
0x40520128 FULL TT Interrupt Line Select
CANFD0_CH0_TTOST
0x4052012C FULL TT Operation Status
CANFD0_CH0_TURNA
0x40520130 FULL TUR Numerator Actual
CANFD0_CH0_TTLGT
0x40520134 FULL TT Local & Global Time
CANFD0_CH0_TTCTC
0x40520138 FULL TT Cycle Time & Count
CANFD0_CH0_TTCPT
0x4052013C FULL TT Capture Time
CANFD0_CH0_TTCSM
0x40520140 FULL TT Cycle Sync Mark
2.1.2 CH 1
Register Name Address Permission Description
CANFD0_CH1_RXFTOP_CTL
0x40520380 FULL Receive FIFO Top control
CANFD0_CH1_RXFTOP0_STAT
0x405203A0 FULL Receive FIFO 0 Top Status
CANFD0_CH1_RXFTOP0_DATA
0x405203A8 FULL Receive FIFO 0 Top Data
CANFD0_CH1_RXFTOP1_STAT
0x405203B0 FULL Receive FIFO 1 Top Status
CANFD0_CH1_RXFTOP1_DATA
0x405203B8 FULL Receive FIFO 1 Top Data
2.1.2.1 M_TTCAN
Register Name Address Permission Description
CANFD0_CH1_CREL
0x40520200 FULL Core Release Register
CANFD0_CH1_ENDN
0x40520204 FULL Endian Register
CANFD0_CH1_DBTP
0x4052020C FULL Data Bit Timing & Prescaler Register
CANFD0_CH1_TEST
0x40520210 FULL Test Register
CANFD0_CH1_RWD
0x40520214 FULL RAM Watchdog
CANFD0_CH1_CCCR
0x40520218 FULL CC Control Register
CANFD0_CH1_NBTP
0x4052021C FULL Nominal Bit Timing & Prescaler Register
CANFD0_CH1_TSCC
0x40520220 FULL Timestamp Counter Configuration
CANFD0_CH1_TSCV
0x40520224 FULL Timestamp Counter Value
CANFD0_CH1_TOCC
0x40520228 FULL Timeout Counter Configuration
CANFD0_CH1_TOCV
0x4052022C FULL Timeout Counter Value
CANFD0_CH1_ECR
0x40520240 FULL Error Counter Register
CANFD0_CH1_PSR
0x40520244 FULL Protocol Status Register
CANFD0_CH1_TDCR
0x40520248 FULL Transmitter Delay Compensation Register
CANFD0_CH1_IR
0x40520250 FULL Interrupt Register
CANFD0_CH1_IE
0x40520254 FULL Interrupt Enable
CANFD0_CH1_ILS
0x40520258 FULL Interrupt Line Select
CANFD0_CH1_ILE
0x4052025C FULL Interrupt Line Enable
CANFD0_CH1_GFC
0x40520280 FULL Global Filter Configuration
CANFD0_CH1_SIDFC
0x40520284 FULL Standard ID Filter Configuration
CANFD0_CH1_XIDFC
0x40520288 FULL Extended ID Filter Configuration
CANFD0_CH1_XIDAM
0x40520290 FULL Extended ID AND Mask
CANFD0_CH1_HPMS
0x40520294 FULL High Priority Message Status
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2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers