Infineon TRAVEO T2G - 4.13.6.36 CM4_CM4 CTI_PID2

Technical Reference Manual 002-29852 Rev. *B
4.13.6.36 CM4_CM4CTI_PID2
Description:
Peripheral Identification Register 2
Address:
0xE0042FE8
Offset:
0xFE8
Retention:
Retained
IsDeepSleep:
No
Comment:
Default:
0x4B
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name VALUE [7:0]
Bits 15 14 13 12 11 10 9 8
Name VALUE [15:8]
Bits 23 22 21 20 19 18 17 16
Name VALUE [23:16]
Bits 31 30 29 28 27 26 25 24
Name VALUE [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:31 VALUE R R 75 N/A
518
2022-04-18
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