Technical Reference Manual 002-29852 Rev. *B
26.8.26 CLK_IMO_CONFIG
Description:
IMO Configuration
Address:
0x40261518
Offset:
0x1518
Retention:
Retained
IsDeepSleep:
Yes
Comment:
Internal high speed R/C oscillator configuration register. Note that this oscillator comes up
active on power up. The oscillator provides the primary system clock (HFCLK) on power up
until firmware configures differently. This oscillator is also used before system start to count
out power up delays. This is done in fast IMO (FIMO) mode that does not require any external
references and runs at a fixed 12MHz.
Default:
0x80000000
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name None [7:0]
Bits 15 14 13 12 11 10 9 8
Name None [15:8]
Bits 23 22 21 20 19 18 17 16
Name None [23:16]
Bits 31 30 29 28 27 26 25 24
Name ENABLE
[31:31]
None [30:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
31 ENABLE RW R 1 Master enable for IMO oscillator. This bit must be high
at all times for all functions to work properly. Hardware
will automatically disable the IMO during DEEPSLEEP,
HIBERNATE, and XRES.
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers
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