Infineon TRAVEO T2G - 18 LIN; 18.1 CH 0; 18.2 CH 1; 18.3 CH 2

Technical Reference Manual 002-29852 Rev. *B
18 LIN
Description
LIN
Base Address
0x40500000
Size
0x10000
Slave Num
MMIO5 - 0
Register Name
Address Permission Description
LIN0_ERROR_CTL
0x40500000 FULL Error control
LIN0_TEST_CTL
0x40500004 FULL Test control
18.1 CH 0
Register Name
Address Permission Description
LIN0_CH0_CTL0
0x40508000 FULL Control 0
LIN0_CH0_CTL1
0x40508004 FULL Control 1
LIN0_CH0_STATUS
0x40508008 FULL Status
LIN0_CH0_CMD
0x40508010 FULL Command
LIN0_CH0_TX_RX_STATUS
0x40508060 FULL TX/RX status
LIN0_CH0_PID_CHECKSUM
0x40508080 FULL PID and checksum
LIN0_CH0_DATA0
0x40508084 FULL Response data 0
LIN0_CH0_DATA1
0x40508088 FULL Response data 1
LIN0_CH0_INTR
0x405080C0 FULL Interrupt
LIN0_CH0_INTR_SET
0x405080C4 FULL Interrupt set
LIN0_CH0_INTR_MASK
0x405080C8 FULL Interrupt mask
LIN0_CH0_INTR_MASKED
0x405080CC FULL Interrupt masked
18.2 CH 1
Register Name Address Permission Description
LIN0_CH1_CTL0
0x40508100 FULL Control 0
LIN0_CH1_CTL1
0x40508104 FULL Control 1
LIN0_CH1_STATUS
0x40508108 FULL Status
LIN0_CH1_CMD
0x40508110 FULL Command
LIN0_CH1_TX_RX_STATUS
0x40508160 FULL TX/RX status
LIN0_CH1_PID_CHECKSUM
0x40508180 FULL PID and checksum
LIN0_CH1_DATA0
0x40508184 FULL Response data 0
LIN0_CH1_DATA1
0x40508188 FULL Response data 1
LIN0_CH1_INTR
0x405081C0 FULL Interrupt
LIN0_CH1_INTR_SET
0x405081C4 FULL Interrupt set
LIN0_CH1_INTR_MASK
0x405081C8 FULL Interrupt mask
LIN0_CH1_INTR_MASKED
0x405081CC FULL Interrupt masked
18.3 CH 2
Register Name Address Permission Description
LIN0_CH2_CTL0
0x40508200 FULL Control 0
LIN0_CH2_CTL1
0x40508204 FULL Control 1
LIN0_CH2_STATUS
0x40508208 FULL Status
LIN0_CH2_CMD
0x40508210 FULL Command
LIN0_CH2_TX_RX_STATUS
0x40508260 FULL TX/RX status
LIN0_CH2_PID_CHECKSUM
0x40508280 FULL PID and checksum
LIN0_CH2_DATA0
0x40508284 FULL Response data 0
LIN0_CH2_DATA1
0x40508288 FULL Response data 1
LIN0_CH2_INTR
0x405082C0 FULL Interrupt
LIN0_CH2_INTR_SET
0x405082C4 FULL Interrupt set
LIN0_CH2_INTR_MASK
0x405082C8 FULL Interrupt mask
LIN0_CH2_INTR_MASKED
0x405082CC FULL Interrupt masked
18.4 CH 3
Register Name Address Permission Description
LIN0_CH3_CTL0
0x40508300 FULL Control 0
LIN0_CH3_CTL1
0x40508304 FULL Control 1
LIN0_CH3_STATUS
0x40508308 FULL Status
1037
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers