Infineon TRAVEO T2G - 21.32 PPU_FX 15; 21.33 PPU_FX 16; 21.34 PPU_FX 17

Technical Reference Manual 002-29852 Rev. *B
Register Name Address Permission Description
PERI_MS_PPU_FX14_SL_ATT3
0x40010B9C FULL Slave attributes 3
PERI_MS_PPU_FX14_MS_ADDR
0x40010BA0 FULL Master region, base address
PERI_MS_PPU_FX14_MS_SIZE
0x40010BA4 FULL Master region, size
PERI_MS_PPU_FX14_MS_ATT0
0x40010BB0 FULL Master attributes 0
PERI_MS_PPU_FX14_MS_ATT1
0x40010BB4 FULL Master attributes 1
PERI_MS_PPU_FX14_MS_ATT2
0x40010BB8 FULL Master attributes 2
PERI_MS_PPU_FX14_MS_ATT3
0x40010BBC FULL Master attributes 3
21.32 PPU_FX 15
Register Name Address Permission Description
PERI_MS_PPU_FX15_SL_ADDR
0x40010BC0 PRIVILEGE
- WRITE
Slave region, base address
PERI_MS_PPU_FX15_SL_SIZE
0x40010BC4 PRIVILEGE
- WRITE
Slave region, size
PERI_MS_PPU_FX15_SL_ATT0
0x40010BD0 PRIVILEGE
- WRITE
Slave attributes 0
PERI_MS_PPU_FX15_SL_ATT1
0x40010BD4 PRIVILEGE
- WRITE
Slave attributes 1
PERI_MS_PPU_FX15_SL_ATT2
0x40010BD8 PRIVILEGE
- WRITE
Slave attributes 2
PERI_MS_PPU_FX15_SL_ATT3
0x40010BDC PRIVILEGE
- WRITE
Slave attributes 3
PERI_MS_PPU_FX15_MS_ADDR
0x40010BE0 PRIVILEGE
- WRITE
Master region, base address
PERI_MS_PPU_FX15_MS_SIZE
0x40010BE4 PRIVILEGE
- WRITE
Master region, size
PERI_MS_PPU_FX15_MS_ATT0
0x40010BF0 PRIVILEGE
- WRITE
Master attributes 0
PERI_MS_PPU_FX15_MS_ATT1
0x40010BF4 PRIVILEGE
- WRITE
Master attributes 1
PERI_MS_PPU_FX15_MS_ATT2
0x40010BF8 PRIVILEGE
- WRITE
Master attributes 2
PERI_MS_PPU_FX15_MS_ATT3
0x40010BFC PRIVILEGE
- WRITE
Master attributes 3
21.33 PPU_FX 16
Register Name Address Permission Description
PERI_MS_PPU_FX16_SL_ADDR
0x40010C00 FULL Slave region, base address
PERI_MS_PPU_FX16_SL_SIZE
0x40010C04 FULL Slave region, size
PERI_MS_PPU_FX16_SL_ATT0
0x40010C10 FULL Slave attributes 0
PERI_MS_PPU_FX16_SL_ATT1
0x40010C14 FULL Slave attributes 1
PERI_MS_PPU_FX16_SL_ATT2
0x40010C18 FULL Slave attributes 2
PERI_MS_PPU_FX16_SL_ATT3
0x40010C1C FULL Slave attributes 3
PERI_MS_PPU_FX16_MS_ADDR
0x40010C20 FULL Master region, base address
PERI_MS_PPU_FX16_MS_SIZE
0x40010C24 FULL Master region, size
PERI_MS_PPU_FX16_MS_ATT0
0x40010C30 FULL Master attributes 0
PERI_MS_PPU_FX16_MS_ATT1
0x40010C34 FULL Master attributes 1
PERI_MS_PPU_FX16_MS_ATT2
0x40010C38 FULL Master attributes 2
PERI_MS_PPU_FX16_MS_ATT3
0x40010C3C FULL Master attributes 3
21.34 PPU_FX 17
Register Name
Address Permission Description
PERI_MS_PPU_FX17_SL_ADDR
0x40010C40 FULL Slave region, base address
PERI_MS_PPU_FX17_SL_SIZE
0x40010C44 FULL Slave region, size
PERI_MS_PPU_FX17_SL_ATT0
0x40010C50 FULL Slave attributes 0
PERI_MS_PPU_FX17_SL_ATT1
0x40010C54 FULL Slave attributes 1
PERI_MS_PPU_FX17_SL_ATT2
0x40010C58 FULL Slave attributes 2
PERI_MS_PPU_FX17_SL_ATT3
0x40010C5C FULL Slave attributes 3
PERI_MS_PPU_FX17_MS_ADDR
0x40010C60 FULL Master region, base address
PERI_MS_PPU_FX17_MS_SIZE
0x40010C64 FULL Master region, size
PERI_MS_PPU_FX17_MS_ATT0
0x40010C70 FULL Master attributes 0
PERI_MS_PPU_FX17_MS_ATT1
0x40010C74 FULL Master attributes 1
1163
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers