Infineon TRAVEO T2G - 15.25.6 GPIO_VDD_INTR_SET

Technical Reference Manual 002-29852 Rev. *B
15.25.6 GPIO_VDD_INTR_SET
Description:
Supply detection interrupt set register
Address:
0x40314020
Offset:
0x4020
Retention:
Retained
IsDeepSleep:
No
Comment:
Allows firmware or debugger to set interrupt bits in the VDD_INTR register by writing a '1' to
the corresponding bit field. When read, returns the same value as the VDD_INTR register.
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name VDDIO_ACTIVE [7:0]
Bits 15 14 13 12 11 10 9 8
Name VDDIO_ACTIVE [15:8]
Bits 23 22 21 20 19 18 17 16
Name None [23:16]
Bits 31 30 29 28 27 26 25 24
Name VDDD
_ACTIVE
[31:31]
VDDA
_ACTIVE
[30:30]
None [29:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:15 VDDIO_ACTIVE RW1S A 0 Sets supply interrupt.
'0': Interrupt state not affected
'1': Interrupt set
30 VDDA_ACTIVE RW1S A 0 Same as VDDIO_ACTIVE for the analog supply
VDDA.
31 VDDD_ACTIVE RW1S A 0 Same as VDDIO_ACTIVE for the digital supply VDDD.
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2022-04-18
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