Technical Reference Manual 002-29852 Rev. *B
Register Name Address Permission Description
TCPWM0_GRP0_CNT55_INTR_SET
0x40381BF4 FULL Interrupt set request register
TCPWM0_GRP0_CNT55_INTR_MASK
0x40381BF8 FULL Interrupt mask register
TCPWM0_GRP0_CNT55_INTR_MASKED
0x40381BFC FULL Interrupt masked request register
28.1.57 CNT 56
Register Name Address Permission Description
TCPWM0_GRP0_CNT56_CTRL
0x40381C00 FULL Counter control register
Note:AUTO_RELOAD_LINE_SEL CC0_MATCH_UP_EN
CC0_MATCH_DOWN_EN CC1_MATCH_UP_EN
CC1_MATCH_DOWN_EN are not available for this
register
TCPWM0_GRP0_CNT56_STATUS
0x40381C04 FULL Counter status register
Note:DT_CNT_H is not available for this register
TCPWM0_GRP0_CNT56_COUNTER
0x40381C08 FULL Counter count register
TCPWM0_GRP0_CNT56_CC0
0x40381C10 FULL Counter compare/capture 0 register
TCPWM0_GRP0_CNT56_CC0_BUFF
0x40381C14 FULL Counter buffered compare/capture 0 register
TCPWM0_GRP0_CNT56_CC1
0x40381C18 FULL Counter compare/capture 1 register
TCPWM0_GRP0_CNT56_CC1_BUFF
0x40381C1C FULL Counter buffered compare/capture 1 register
TCPWM0_GRP0_CNT56_PERIOD
0x40381C20 FULL Counter period register
TCPWM0_GRP0_CNT56_PERIOD_BUFF
0x40381C24 FULL Counter buffered period register
TCPWM0_GRP0_CNT56_DT
0x40381C30 FULL Counter PWM dead time register
Note:DT_LINE_OUT_H DT_LINE_COMPL_OUT are not
available for this register
TCPWM0_GRP0_CNT56_TR_CMD
0x40381C40 FULL Counter trigger command register
TCPWM0_GRP0_CNT56_TR_IN_SEL0
0x40381C44 FULL Counter input trigger selection register 0
TCPWM0_GRP0_CNT56_TR_IN_SEL1
0x40381C48 FULL Counter input trigger selection register 1
TCPWM0_GRP0_CNT56_TR_IN_EDGE_SEL
0x40381C4C FULL Counter input trigger edge selection register
TCPWM0_GRP0_CNT56_TR_PWM_CTRL
0x40381C50 FULL Counter trigger PWM control register
TCPWM0_GRP0_CNT56_TR_OUT_SEL
0x40381C54 FULL Counter output trigger selection register
TCPWM0_GRP0_CNT56_INTR
0x40381C70 FULL Interrupt request register
TCPWM0_GRP0_CNT56_INTR_SET
0x40381C74 FULL Interrupt set request register
TCPWM0_GRP0_CNT56_INTR_MASK
0x40381C78 FULL Interrupt mask register
TCPWM0_GRP0_CNT56_INTR_MASKED
0x40381C7C FULL Interrupt masked request register
28.1.58 CNT 57
Register Name Address Permission Description
TCPWM0_GRP0_CNT57_CTRL
0x40381C80 FULL Counter control register
Note:AUTO_RELOAD_LINE_SEL CC0_MATCH_UP_EN
CC0_MATCH_DOWN_EN CC1_MATCH_UP_EN
CC1_MATCH_DOWN_EN are not available for this
register
TCPWM0_GRP0_CNT57_STATUS
0x40381C84 FULL Counter status register
Note:DT_CNT_H is not available for this register
TCPWM0_GRP0_CNT57_COUNTER
0x40381C88 FULL Counter count register
TCPWM0_GRP0_CNT57_CC0
0x40381C90 FULL Counter compare/capture 0 register
TCPWM0_GRP0_CNT57_CC0_BUFF
0x40381C94 FULL Counter buffered compare/capture 0 register
TCPWM0_GRP0_CNT57_CC1
0x40381C98 FULL Counter compare/capture 1 register
TCPWM0_GRP0_CNT57_CC1_BUFF
0x40381C9C FULL Counter buffered compare/capture 1 register
TCPWM0_GRP0_CNT57_PERIOD
0x40381CA0 FULL Counter period register
TCPWM0_GRP0_CNT57_PERIOD_BUFF
0x40381CA4 FULL Counter buffered period register
TCPWM0_GRP0_CNT57_DT
0x40381CB0 FULL Counter PWM dead time register
Note:DT_LINE_OUT_H DT_LINE_COMPL_OUT are not
available for this register
TCPWM0_GRP0_CNT57_TR_CMD
0x40381CC0 FULL Counter trigger command register
TCPWM0_GRP0_CNT57_TR_IN_SEL0
0x40381CC4 FULL Counter input trigger selection register 0
TCPWM0_GRP0_CNT57_TR_IN_SEL1
0x40381CC8 FULL Counter input trigger selection register 1
TCPWM0_GRP0_CNT57_TR_IN_EDGE_SEL
0x40381CCC FULL Counter input trigger edge selection register
TCPWM0_GRP0_CNT57_TR_PWM_CTRL
0x40381CD0 FULL Counter trigger PWM control register
TCPWM0_GRP0_CNT57_TR_OUT_SEL
0x40381CD4 FULL Counter output trigger selection register
TCPWM0_GRP0_CNT57_INTR
0x40381CF0 FULL Interrupt request register
TCPWM0_GRP0_CNT57_INTR_SET
0x40381CF4 FULL Interrupt set request register
TCPWM0_GRP0_CNT57_INTR_MASK
0x40381CF8 FULL Interrupt mask register
TCPWM0_GRP0_CNT57_INTR_MASKED
0x40381CFC FULL Interrupt masked request register
28.1.59 CNT 58
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers