Technical Reference Manual 002-29852 Rev. *B
2.3.9.6.25 CANFD_CH_NDAT2
Description:
New Data 2
Address:
0x4052009C
Offset:
0x9C
Retention:
Retained
IsDeepSleep:
No
Comment:
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name ND [7:0]
Bits 15 14 13 12 11 10 9 8
Name ND [15:8]
Bits 23 22 21 20 19 18 17 16
Name ND [23:16]
Bits 31 30 29 28 27 26 25 24
Name ND [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:31 ND RW1C RW 0 New Data
The register holds the New Data flags of Rx Buffers 32
to 63. The flags are set when the respective
Rx Buffer has been updated from a received frame.
The flags remain set until the Host clears them.
A flag is cleared by writing a '1' to the corresponding
bit position. Writing a '0' has no effect. A hard
reset will clear the register.
0= Rx Buffer not updated
1= Rx Buffer updated from new message
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers
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