Infineon TRAVEO T2G - 4.13.9 CSTF; 4.13.9.1 CM4_CSTF_CSTFCTL

Technical Reference Manual 002-29852 Rev. *B
4.13.9 CSTF
4.13.9.1 CM4_CSTF_CSTFCTL
Description:
Funnel Control Register
Address:
0xE008C000
Offset:
0x0
Retention:
Retained
IsDeepSleep:
No
Comment:
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name VALUE [7:0]
Bits 15 14 13 12 11 10 9 8
Name VALUE [15:8]
Bits 23 22 21 20 19 18 17 16
Name VALUE [23:16]
Bits 31 30 29 28 27 26 25 24
Name VALUE [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:31 VALUE RW R 0 Refer CoreSight TRM for details of register description:
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.100536_0302_01_en/index.html
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2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers