Technical Reference Manual 002-29852 Rev. *B
Register Name Address Permission Description
DW0_CH_STRUCT83_CH_CURR_PTR
0x402894CC FULL Channel current descriptor pointer
DW0_CH_STRUCT83_INTR
0x402894D0 FULL Interrupt
DW0_CH_STRUCT83_INTR_SET
0x402894D4 FULL Interrupt set
DW0_CH_STRUCT83_INTR_MASK
0x402894D8 FULL Interrupt mask
DW0_CH_STRUCT83_INTR_MASKED
0x402894DC FULL Interrupt masked
DW0_CH_STRUCT83_SRAM_DATA0
0x402894E0 FULL SRAM data 0
DW0_CH_STRUCT83_SRAM_DATA1
0x402894E4 FULL SRAM data 1
DW0_CH_STRUCT83_TR_CMD
0x402894E8 FULL Channel software trigger
9.1.1.85 CH_STRUCT 84
Register Name Address Permission Description
DW0_CH_STRUCT84_CH_CTL
0x40289500 FULL Channel control
DW0_CH_STRUCT84_CH_STATUS
0x40289504 FULL Channel status
DW0_CH_STRUCT84_CH_IDX
0x40289508 FULL Channel current indices
DW0_CH_STRUCT84_CH_CURR_PTR
0x4028950C FULL Channel current descriptor pointer
DW0_CH_STRUCT84_INTR
0x40289510 FULL Interrupt
DW0_CH_STRUCT84_INTR_SET
0x40289514 FULL Interrupt set
DW0_CH_STRUCT84_INTR_MASK
0x40289518 FULL Interrupt mask
DW0_CH_STRUCT84_INTR_MASKED
0x4028951C FULL Interrupt masked
DW0_CH_STRUCT84_SRAM_DATA0
0x40289520 FULL SRAM data 0
DW0_CH_STRUCT84_SRAM_DATA1
0x40289524 FULL SRAM data 1
DW0_CH_STRUCT84_TR_CMD
0x40289528 FULL Channel software trigger
9.1.1.86 CH_STRUCT 85
Register Name Address Permission Description
DW0_CH_STRUCT85_CH_CTL
0x40289540 FULL Channel control
DW0_CH_STRUCT85_CH_STATUS
0x40289544 FULL Channel status
DW0_CH_STRUCT85_CH_IDX
0x40289548 FULL Channel current indices
DW0_CH_STRUCT85_CH_CURR_PTR
0x4028954C FULL Channel current descriptor pointer
DW0_CH_STRUCT85_INTR
0x40289550 FULL Interrupt
DW0_CH_STRUCT85_INTR_SET
0x40289554 FULL Interrupt set
DW0_CH_STRUCT85_INTR_MASK
0x40289558 FULL Interrupt mask
DW0_CH_STRUCT85_INTR_MASKED
0x4028955C FULL Interrupt masked
DW0_CH_STRUCT85_SRAM_DATA0
0x40289560 FULL SRAM data 0
DW0_CH_STRUCT85_SRAM_DATA1
0x40289564 FULL SRAM data 1
DW0_CH_STRUCT85_TR_CMD
0x40289568 FULL Channel software trigger
9.1.1.87 CH_STRUCT 86
Register Name Address Permission Description
DW0_CH_STRUCT86_CH_CTL
0x40289580 FULL Channel control
DW0_CH_STRUCT86_CH_STATUS
0x40289584 FULL Channel status
DW0_CH_STRUCT86_CH_IDX
0x40289588 FULL Channel current indices
DW0_CH_STRUCT86_CH_CURR_PTR
0x4028958C FULL Channel current descriptor pointer
DW0_CH_STRUCT86_INTR
0x40289590 FULL Interrupt
DW0_CH_STRUCT86_INTR_SET
0x40289594 FULL Interrupt set
DW0_CH_STRUCT86_INTR_MASK
0x40289598 FULL Interrupt mask
DW0_CH_STRUCT86_INTR_MASKED
0x4028959C FULL Interrupt masked
DW0_CH_STRUCT86_SRAM_DATA0
0x402895A0 FULL SRAM data 0
DW0_CH_STRUCT86_SRAM_DATA1
0x402895A4 FULL SRAM data 1
DW0_CH_STRUCT86_TR_CMD
0x402895A8 FULL Channel software trigger
9.1.1.88 CH_STRUCT 87
Register Name Address Permission Description
DW0_CH_STRUCT87_CH_CTL
0x402895C0 FULL Channel control
DW0_CH_STRUCT87_CH_STATUS
0x402895C4 FULL Channel status
DW0_CH_STRUCT87_CH_IDX
0x402895C8 FULL Channel current indices
DW0_CH_STRUCT87_CH_CURR_PTR
0x402895CC FULL Channel current descriptor pointer
DW0_CH_STRUCT87_INTR
0x402895D0 FULL Interrupt
DW0_CH_STRUCT87_INTR_SET
0x402895D4 FULL Interrupt set
DW0_CH_STRUCT87_INTR_MASK
0x402895D8 FULL Interrupt mask
DW0_CH_STRUCT87_INTR_MASKED
0x402895DC FULL Interrupt masked
DW0_CH_STRUCT87_SRAM_DATA0
0x402895E0 FULL SRAM data 0
DW0_CH_STRUCT87_SRAM_DATA1
0x402895E4 FULL SRAM data 1
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers