Infineon TRAVEO T2G - 2.3.9.6.35 CANFD_CH_TXFQS

Technical Reference Manual 002-29852 Rev. *B
2.3.9.6.35 CANFD_CH_TXFQS
Description:
Tx FIFO/Queue Status
Address:
0x405200C4
Offset:
0xC4
Retention:
Retained
IsDeepSleep:
No
Comment:
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name None [7:6] TFFL [5:0]
Bits 15 14 13 12 11 10 9 8
Name None [15:13] TFGI [12:8]
Bits 23 22 21 20 19 18 17 16
Name None [23:22] TFQF
[21:21]
TFQPI [20:16]
Bits 31 30 29 28 27 26 25 24
Name None [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:5 TFFL R RW 0 Tx FIFO Free Level
Number of consecutive free Tx FIFO elements starting
from TFGI, range 0 to 32. Read as zero when
Tx Queue operation is configured (TXBC.TFQM = '1')
8:12 TFGI R RW 0 Tx FIFO Get Index
Tx FIFO read index pointer, range 0 to 31. Read as
zero when Tx Queue operation is configured
TXBC.TFQM = '1').
16:20 TFQPI R RW 0 Tx FIFO/Queue Put Index
Tx FIFO/Queue write index pointer, range 0 to 31.
21 TFQF R RW 0 Tx FIFO/Queue Full
0= Tx FIFO/Queue not full
1= Tx FIFO/Queue full
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2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers