Infineon TRAVEO T2G - 2.3.3 CANFD_INTR0_CAUSE

Technical Reference Manual 002-29852 Rev. *B
2.3.3 CANFD_INTR0_CAUSE
Description:
Consolidated interrupt0 cause register
Address:
0x40521010
Offset:
0x1010
Retention:
Retained
IsDeepSleep:
No
Comment:
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name INT0 [7:0]
Bits 15 14 13 12 11 10 9 8
Name None [15:8]
Bits 23 22 21 20 19 18 17 16
Name None [23:16]
Bits 31 30 29 28 27 26 25 24
Name None [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:7 INT0 R RW 0 Show pending m_ttcan_int0 of each channel
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2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers