Infineon TRAVEO T2G - 7.5.3.9 CXPI_CH_CRC

Technical Reference Manual 002-29852 Rev. *B
7.5.3.9 CXPI_CH_CRC
Description:
CRC
Address:
0x40518058
Offset:
0x58
Retention:
Not Retained
IsDeepSleep:
No
Comment:
This register holds the CRC bytes for RX and TX.
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name RXCRC1 [7:0]
Bits 15 14 13 12 11 10 9 8
Name RXCRC2 [15:8]
Bits 23 22 21 20 19 18 17 16
Name TXCRC1 [23:16]
Bits 31 30 29 28 27 26 25 24
Name TXCRC2 [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:7 RXCRC1 R RW Undefined CRC first byte for both CRC8 and CRC16. This is valid
for both Normal frame and Long frame.
HW will load this field with first byte of CRC upon
receiving it.
8:15 RXCRC2 R RW Undefined CRC second byte of CRC16. This is valid only for Long
frames.
HW will load this field with second byte of CRC upon
receiving it.
16:23 TXCRC1 R RW Undefined CRC first byte for both CRC8 and CRC16. This is valid
for both Normal frame and Long frame.
HW will load this field with first byte of CRC for
transmit.
24:31 TXCRC2 R RW Undefined CRC second byte of CRC16. This is valid only for Long
frames.
HW will load this field with second byte of CRC for
transmit.
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2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers