Infineon TRAVEO T2G - 3.8.6.25 CM0 P_CTI_LOCKACCESS

Technical Reference Manual 002-29852 Rev. *B
3.8.6.25 CM0P_CTI_LOCKACCESS
Description:
Lock Access Register
Address:
0xF0002FB0
Offset:
0xFB0
Retention:
Retained
IsDeepSleep:
No
Comment:
This is used to enable write access to device registers. If LOCKSTATUS[0] == 0x0 then this
register is not present.
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name None [7:4] ACCESS_CODE [3:0]
Bits 15 14 13 12 11 10 9 8
Name None [15:8]
Bits 23 22 21 20 19 18 17 16
Name None [23:16]
Bits 31 30 29 28 27 26 25 24
Name None [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:3 ACCESS_CODE RW R 0 Write Access Code. A write of 0xC5ACCE55 enables
further write access to this device. An invalid write will
have the affect of removing write access.
If LOCKSTATUS[2] is set, then only bits [7:0] of this
register are implemented and lock access is obtained
by consecutively writing 0xC5, 0xAC, 0xCE, 0x55. Bits
[31:8] are unused and any writes to them ignored.
255
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers