Infineon TRAVEO T2G - 9.1.1.4 CH_STRUCT 3; 9.1.1.5 CH_STRUCT 4; 9.1.1.6 CH_STRUCT 5; 9.1.1.7 CH_STRUCT 6

Technical Reference Manual 002-29852 Rev. *B
Register Name Address Permission Description
DW0_CH_STRUCT2_CH_CURR_PTR
0x4028808C FULL Channel current descriptor pointer
DW0_CH_STRUCT2_INTR
0x40288090 FULL Interrupt
DW0_CH_STRUCT2_INTR_SET
0x40288094 FULL Interrupt set
DW0_CH_STRUCT2_INTR_MASK
0x40288098 FULL Interrupt mask
DW0_CH_STRUCT2_INTR_MASKED
0x4028809C FULL Interrupt masked
DW0_CH_STRUCT2_SRAM_DATA0
0x402880A0 FULL SRAM data 0
DW0_CH_STRUCT2_SRAM_DATA1
0x402880A4 FULL SRAM data 1
DW0_CH_STRUCT2_TR_CMD
0x402880A8 FULL Channel software trigger
9.1.1.4 CH_STRUCT 3
Register Name Address Permission Description
DW0_CH_STRUCT3_CH_CTL
0x402880C0 FULL Channel control
DW0_CH_STRUCT3_CH_STATUS
0x402880C4 FULL Channel status
DW0_CH_STRUCT3_CH_IDX
0x402880C8 FULL Channel current indices
DW0_CH_STRUCT3_CH_CURR_PTR
0x402880CC FULL Channel current descriptor pointer
DW0_CH_STRUCT3_INTR
0x402880D0 FULL Interrupt
DW0_CH_STRUCT3_INTR_SET
0x402880D4 FULL Interrupt set
DW0_CH_STRUCT3_INTR_MASK
0x402880D8 FULL Interrupt mask
DW0_CH_STRUCT3_INTR_MASKED
0x402880DC FULL Interrupt masked
DW0_CH_STRUCT3_SRAM_DATA0
0x402880E0 FULL SRAM data 0
DW0_CH_STRUCT3_SRAM_DATA1
0x402880E4 FULL SRAM data 1
DW0_CH_STRUCT3_TR_CMD
0x402880E8 FULL Channel software trigger
9.1.1.5 CH_STRUCT 4
Register Name Address Permission Description
DW0_CH_STRUCT4_CH_CTL
0x40288100 FULL Channel control
DW0_CH_STRUCT4_CH_STATUS
0x40288104 FULL Channel status
DW0_CH_STRUCT4_CH_IDX
0x40288108 FULL Channel current indices
DW0_CH_STRUCT4_CH_CURR_PTR
0x4028810C FULL Channel current descriptor pointer
DW0_CH_STRUCT4_INTR
0x40288110 FULL Interrupt
DW0_CH_STRUCT4_INTR_SET
0x40288114 FULL Interrupt set
DW0_CH_STRUCT4_INTR_MASK
0x40288118 FULL Interrupt mask
DW0_CH_STRUCT4_INTR_MASKED
0x4028811C FULL Interrupt masked
DW0_CH_STRUCT4_SRAM_DATA0
0x40288120 FULL SRAM data 0
DW0_CH_STRUCT4_SRAM_DATA1
0x40288124 FULL SRAM data 1
DW0_CH_STRUCT4_TR_CMD
0x40288128 FULL Channel software trigger
9.1.1.6 CH_STRUCT 5
Register Name Address Permission Description
DW0_CH_STRUCT5_CH_CTL
0x40288140 FULL Channel control
DW0_CH_STRUCT5_CH_STATUS
0x40288144 FULL Channel status
DW0_CH_STRUCT5_CH_IDX
0x40288148 FULL Channel current indices
DW0_CH_STRUCT5_CH_CURR_PTR
0x4028814C FULL Channel current descriptor pointer
DW0_CH_STRUCT5_INTR
0x40288150 FULL Interrupt
DW0_CH_STRUCT5_INTR_SET
0x40288154 FULL Interrupt set
DW0_CH_STRUCT5_INTR_MASK
0x40288158 FULL Interrupt mask
DW0_CH_STRUCT5_INTR_MASKED
0x4028815C FULL Interrupt masked
DW0_CH_STRUCT5_SRAM_DATA0
0x40288160 FULL SRAM data 0
DW0_CH_STRUCT5_SRAM_DATA1
0x40288164 FULL SRAM data 1
DW0_CH_STRUCT5_TR_CMD
0x40288168 FULL Channel software trigger
9.1.1.7 CH_STRUCT 6
Register Name Address Permission Description
DW0_CH_STRUCT6_CH_CTL
0x40288180 FULL Channel control
DW0_CH_STRUCT6_CH_STATUS
0x40288184 FULL Channel status
DW0_CH_STRUCT6_CH_IDX
0x40288188 FULL Channel current indices
DW0_CH_STRUCT6_CH_CURR_PTR
0x4028818C FULL Channel current descriptor pointer
DW0_CH_STRUCT6_INTR
0x40288190 FULL Interrupt
DW0_CH_STRUCT6_INTR_SET
0x40288194 FULL Interrupt set
DW0_CH_STRUCT6_INTR_MASK
0x40288198 FULL Interrupt mask
DW0_CH_STRUCT6_INTR_MASKED
0x4028819C FULL Interrupt masked
DW0_CH_STRUCT6_SRAM_DATA0
0x402881A0 FULL SRAM data 0
DW0_CH_STRUCT6_SRAM_DATA1
0x402881A4 FULL SRAM data 1
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TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers