Infineon TRAVEO T2G - 26.8.46.1.3 CSV_HF_CSV_MON_CTL

Technical Reference Manual 002-29852 Rev. *B
26.8.46.1.3 CSV_HF_CSV_MON_CTL
Description:
Clock Supervision Monitor Control
Address:
0x40261408
Offset:
0x8
Retention:
Retained
IsDeepSleep:
No
Comment:
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name PERIOD [7:0]
Bits 15 14 13 12 11 10 9 8
Name PERIOD [15:8]
Bits 23 22 21 20 19 18 17 16
Name None [23:16]
Bits 31 30 29 28 27 26 25 24
Name None [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:15 PERIOD RW R 0 Period time. Set the Period -1, in monitored clock
cycles, before the next monitored clock event
happens.
PERIOD <= (UPPER+1) / FREQ_RATIO -1, with
FREQ_RATIO = (Reference frequency / Monitored
frequency)
In case the clocks are asynchronous: PERIOD <=
UPPER / FREQ_RATIO -1
Additionally margin must be added for accuracy of
both clocks.
1694
2022-04-18
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