Infineon TRAVEO T2G - 26.8.33 CLK_FLL_CONFIG4

Technical Reference Manual 002-29852 Rev. *B
26.8.33 CLK_FLL_CONFIG4
Description:
FLL Configuration Register 4
Address:
0x4026153C
Offset:
0x153C
Retention:
Retained
IsDeepSleep:
Yes
Comment:
This register contains frequency lock loop (FLL) configuration. Do not change settings while
the FLL is running.
Default:
0xFF
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name CCO_LIMIT [7:0]
Bits 15 14 13 12 11 10 9 8
Name None [15:11] CCO_RANGE [10:8]
Bits 23 22 21 20 19 18 17 16
Name CCO_FREQ [23:16]
Bits 31 30 29 28 27 26 25 24
Name CCO
_ENABLE
[31:31]
CCO_HW
_UPDATE
_DIS
[30:30]
None [29:25] CCO
_FREQ
[24:24]
Bit-fields
Bits
Name SW HW Default or
Enum
Description
0:7 CCO_LIMIT RW R 255 Maximum CCO offset allowed (used to prevent FLL
dynamics from selecting an CCO frequency that the
logic cannot support)
8:10 CCO_RANGE RW R 0 Frequency range of CCO
RANGE0 0 Target frequency is in range [48, 64) MHz
RANGE1 1 Target frequency is in range [64, 85) MHz
RANGE2 2 Target frequency is in range [85, 113) MHz
RANGE3 3 Target frequency is in range [113, 150) MHz
RANGE4 4 Target frequency is in range [150, 200] MHz
16:24 CCO_FREQ RW RW 0 CCO frequency code. This is updated by HW when the
FLL is enabled. It can be manually updated to use the
CCO in an open loop configuration. The meaning of
each frequency code depends on the range.
30 CCO_HW_UPDATE_DIS RW R 0 Disable CCO frequency update by FLL hardware
0: Hardware update of CCO settings is allowed. Use
this setting for normal FLL operation.
1: Hardware update of CCO settings is disabled. Use
this setting for open-loop FLL operation.
31 CCO_ENABLE RW R 0 Enable the CCO. It is required to enable the CCO
before using the FLL.
0: Block is powered off
1: Block is powered on
1675
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers