Technical Reference Manual 002-29852 Rev. *B
Register Name Address Permission Description
PASS0_SAR0_CH22_TR_CTL
0x40900D80 FULL Trigger control.
PASS0_SAR0_CH22_SAMPLE_CTL
0x40900D84 FULL Sample control.
PASS0_SAR0_CH22_POST_CTL
0x40900D88 FULL Post processing control
PASS0_SAR0_CH22_RANGE_CTL
0x40900D8C FULL Range thresholds
PASS0_SAR0_CH22_INTR
0x40900D90 FULL Interrupt request register.
PASS0_SAR0_CH22_INTR_SET
0x40900D94 FULL Interrupt set request register
PASS0_SAR0_CH22_INTR_MASK
0x40900D98 FULL Interrupt mask register.
PASS0_SAR0_CH22_INTR_MASKED
0x40900D9C FULL Interrupt masked request register
PASS0_SAR0_CH22_WORK
0x40900DA0 FULL Working data register
PASS0_SAR0_CH22_RESULT
0x40900DA4 FULL Result data register
PASS0_SAR0_CH22_GRP_STAT
0x40900DA8 FULL Group status register
PASS0_SAR0_CH22_ENABLE
0x40900DB8 FULL Enable register
PASS0_SAR0_CH22_TR_CMD
0x40900DBC FULL Software triggers
19.1.24 CH 23
Register Name Address Permission Description
PASS0_SAR0_CH23_TR_CTL
0x40900DC0 FULL Trigger control.
PASS0_SAR0_CH23_SAMPLE_CTL
0x40900DC4 FULL Sample control.
PASS0_SAR0_CH23_POST_CTL
0x40900DC8 FULL Post processing control
PASS0_SAR0_CH23_RANGE_CTL
0x40900DCC FULL Range thresholds
PASS0_SAR0_CH23_INTR
0x40900DD0 FULL Interrupt request register.
PASS0_SAR0_CH23_INTR_SET
0x40900DD4 FULL Interrupt set request register
PASS0_SAR0_CH23_INTR_MASK
0x40900DD8 FULL Interrupt mask register.
PASS0_SAR0_CH23_INTR_MASKED
0x40900DDC FULL Interrupt masked request register
PASS0_SAR0_CH23_WORK
0x40900DE0 FULL Working data register
PASS0_SAR0_CH23_RESULT
0x40900DE4 FULL Result data register
PASS0_SAR0_CH23_GRP_STAT
0x40900DE8 FULL Group status register
PASS0_SAR0_CH23_ENABLE
0x40900DF8 FULL Enable register
PASS0_SAR0_CH23_TR_CMD
0x40900DFC FULL Software triggers
19.2 SAR 1
Register Name Address Permission Description
PASS0_SAR1_CTL
0x40901000 FULL Analog control register.
PASS0_SAR1_DIAG_CTL
0x40901004 FULL Diagnostic Reference control register.
PASS0_SAR1_PRECOND_CTL
0x40901010 FULL Preconditioning control register.
PASS0_SAR1_ANA_CAL
0x40901080 FULL Current analog calibration values
PASS0_SAR1_DIG_CAL
0x40901084 FULL Current digital calibration values
PASS0_SAR1_ANA_CAL_ALT
0x40901090 FULL Alternate analog calibration values
PASS0_SAR1_DIG_CAL_ALT
0x40901094 FULL Alternate digital calibration values
PASS0_SAR1_CAL_UPD_CMD
0x40901098 FULL Calibration update command
PASS0_SAR1_TR_PEND
0x40901100 FULL Trigger pending status
PASS0_SAR1_WORK_VALID
0x40901180 FULL Channel working data register 'valid' bits
PASS0_SAR1_WORK_RANGE
0x40901184 FULL Range detected
PASS0_SAR1_WORK_RANGE_HI
0x40901188 FULL Range detect above Hi flag
PASS0_SAR1_WORK_PULSE
0x4090118C FULL Pulse detected
PASS0_SAR1_RESULT_VALID
0x409011A0 FULL Channel result data register 'valid' bits
PASS0_SAR1_RESULT_RANGE_HI
0x409011A4 FULL Channel Range above Hi flags
PASS0_SAR1_STATUS
0x40901200 FULL Current status of internal SAR registers (mostly for
debug)
PASS0_SAR1_AVG_STAT
0x40901204 FULL Current averaging status (for debug)
19.2.1 CH 0
Register Name Address Permission Description
PASS0_SAR1_CH0_TR_CTL
0x40901800 FULL Trigger control.
PASS0_SAR1_CH0_SAMPLE_CTL
0x40901804 FULL Sample control.
PASS0_SAR1_CH0_POST_CTL
0x40901808 FULL Post processing control
PASS0_SAR1_CH0_RANGE_CTL
0x4090180C FULL Range thresholds
PASS0_SAR1_CH0_INTR
0x40901810 FULL Interrupt request register.
PASS0_SAR1_CH0_INTR_SET
0x40901814 FULL Interrupt set request register
PASS0_SAR1_CH0_INTR_MASK
0x40901818 FULL Interrupt mask register.
PASS0_SAR1_CH0_INTR_MASKED
0x4090181C FULL Interrupt masked request register
PASS0_SAR1_CH0_WORK
0x40901820 FULL Working data register
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers
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