Technical Reference Manual 002-29852 Rev. *B
19.5.1.18.2 PASS_SAR_CH_SAMPLE_CTL
Description:
Sample control.
Address:
0x40900804
Offset:
0x4
Retention:
Retained
IsDeepSleep:
No
Comment:
Make sure the channel or the IP is disabled before changing this register
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name PORT_ADDR [7:6] PIN_ADDR [5:0]
Bits 15 14 13 12 11 10 9 8
Name OVERLAP_DIAG [15:14] PRECOND_MODE
[13:12]
EXT_MUX
_EN [11:11]
EXT_MUX_SEL [10:8]
Bits 23 22 21 20 19 18 17 16
Name SAMPLE_TIME [23:16]
Bits 31 30 29 28 27 26 25 24
Name ALT_CAL
[31:31]
None [30:28] SAMPLE_TIME [27:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:5 PIN_ADDR RW R Undefined Address of the analog signal (pin) to be sampled by
this channel
- 0..31 : Vout = AN0..31, select corresponding analog
input
- 32: Vout = Vmotor, select motor input
- 33: Vout = Vaux, select auxiliary input
- 34: Vout = AmuxbusA
- 35: Vout = AmuxbusB
- 36: Vout = Vccd
- 37: Vout = Vdda
- 38: Vout = Vbg, Bandgap voltage from SRSS
- 39: Vout = Vtemp, select temperature sensor. Make
sure that only 1 ADC is allowed to use this.
- 40..61: Vout = undefined, reserved for future products
- 62: Vout = VrefL (VrefL actually bypasses the
SARMUX (XSL))
- 63: Vout = VrefH (VrefH actually bypasses the
SARMUX (XSH))
Note: When PORT_ADDR is not set to SARMUX0, pin
addresses from 32-63 are not available. Only
addresses 0-31 can be accessed from SARMUX1-3
6:7 PORT_ADDR RW R Undefined Select the physical port. This field is only valid for
ADC0.
ADC0 can control and connect to the SARMUX of the
neighboring ADC1-3. This requires the corresponding
ADC to be off while the SARMUX is left on.
When ADC0 controls another SARMUX it uses the
PIN_ADDR, EXT_MUX_EN/SEL of this channel to
control the other SARMUX.
SARMUX0 0 ADC uses it's own SARMUX
SARMUX1 1 ADC0 uses SARMUX1 (only valid for ADC0, undefined
result if used for ADC1-3)
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers
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