Infineon TRAVEO T2G - 21.504.2.7 PERI_MS_PPU_FX_MS_ADDR

Technical Reference Manual 002-29852 Rev. *B
21.504.2.7 PERI_MS_PPU_FX_MS_ADDR
Description:
Master region, base address
Address:
0x40010820
Offset:
0x20
Retention:
Retained
IsDeepSleep:
No
Comment:
MS_ADDR is fixed (non-programmable).
The access privileges for MS_ADDR are determined by MS_ATT0, ..., MS_ATT3.
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name None [5:0]
Bits 15 14 13 12 11 10 9 8
Name ADDR26 [15:8]
Bits 23 22 21 20 19 18 17 16
Name ADDR26 [23:16]
Bits 31 30 29 28 27 26 25 24
Name ADDR26 [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
6:31 ADDR26 R R ADDR1
_DEF
This field specifies the base address of the master
region. The base address of the region is the address
of the SL_ADDR register.
1303
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers