Technical Reference Manual 002-29852 Rev. *B
9.2.1.22 CH_STRUCT 21
Register Name Address Permission Description
DW1_CH_STRUCT21_CH_CTL
0x40298540 FULL Channel control
DW1_CH_STRUCT21_CH_STATUS
0x40298544 FULL Channel status
DW1_CH_STRUCT21_CH_IDX
0x40298548 FULL Channel current indices
DW1_CH_STRUCT21_CH_CURR_PTR
0x4029854C FULL Channel current descriptor pointer
DW1_CH_STRUCT21_INTR
0x40298550 FULL Interrupt
DW1_CH_STRUCT21_INTR_SET
0x40298554 FULL Interrupt set
DW1_CH_STRUCT21_INTR_MASK
0x40298558 FULL Interrupt mask
DW1_CH_STRUCT21_INTR_MASKED
0x4029855C FULL Interrupt masked
DW1_CH_STRUCT21_SRAM_DATA0
0x40298560 FULL SRAM data 0
DW1_CH_STRUCT21_SRAM_DATA1
0x40298564 FULL SRAM data 1
DW1_CH_STRUCT21_TR_CMD
0x40298568 FULL Channel software trigger
9.2.1.23 CH_STRUCT 22
Register Name Address Permission Description
DW1_CH_STRUCT22_CH_CTL
0x40298580 FULL Channel control
DW1_CH_STRUCT22_CH_STATUS
0x40298584 FULL Channel status
DW1_CH_STRUCT22_CH_IDX
0x40298588 FULL Channel current indices
DW1_CH_STRUCT22_CH_CURR_PTR
0x4029858C FULL Channel current descriptor pointer
DW1_CH_STRUCT22_INTR
0x40298590 FULL Interrupt
DW1_CH_STRUCT22_INTR_SET
0x40298594 FULL Interrupt set
DW1_CH_STRUCT22_INTR_MASK
0x40298598 FULL Interrupt mask
DW1_CH_STRUCT22_INTR_MASKED
0x4029859C FULL Interrupt masked
DW1_CH_STRUCT22_SRAM_DATA0
0x402985A0 FULL SRAM data 0
DW1_CH_STRUCT22_SRAM_DATA1
0x402985A4 FULL SRAM data 1
DW1_CH_STRUCT22_TR_CMD
0x402985A8 FULL Channel software trigger
9.2.1.24 CH_STRUCT 23
Register Name Address Permission Description
DW1_CH_STRUCT23_CH_CTL
0x402985C0 FULL Channel control
DW1_CH_STRUCT23_CH_STATUS
0x402985C4 FULL Channel status
DW1_CH_STRUCT23_CH_IDX
0x402985C8 FULL Channel current indices
DW1_CH_STRUCT23_CH_CURR_PTR
0x402985CC FULL Channel current descriptor pointer
DW1_CH_STRUCT23_INTR
0x402985D0 FULL Interrupt
DW1_CH_STRUCT23_INTR_SET
0x402985D4 FULL Interrupt set
DW1_CH_STRUCT23_INTR_MASK
0x402985D8 FULL Interrupt mask
DW1_CH_STRUCT23_INTR_MASKED
0x402985DC FULL Interrupt masked
DW1_CH_STRUCT23_SRAM_DATA0
0x402985E0 FULL SRAM data 0
DW1_CH_STRUCT23_SRAM_DATA1
0x402985E4 FULL SRAM data 1
DW1_CH_STRUCT23_TR_CMD
0x402985E8 FULL Channel software trigger
9.2.1.25 CH_STRUCT 24
Register Name Address Permission Description
DW1_CH_STRUCT24_CH_CTL
0x40298600 FULL Channel control
DW1_CH_STRUCT24_CH_STATUS
0x40298604 FULL Channel status
DW1_CH_STRUCT24_CH_IDX
0x40298608 FULL Channel current indices
DW1_CH_STRUCT24_CH_CURR_PTR
0x4029860C FULL Channel current descriptor pointer
DW1_CH_STRUCT24_INTR
0x40298610 FULL Interrupt
DW1_CH_STRUCT24_INTR_SET
0x40298614 FULL Interrupt set
DW1_CH_STRUCT24_INTR_MASK
0x40298618 FULL Interrupt mask
DW1_CH_STRUCT24_INTR_MASKED
0x4029861C FULL Interrupt masked
DW1_CH_STRUCT24_SRAM_DATA0
0x40298620 FULL SRAM data 0
DW1_CH_STRUCT24_SRAM_DATA1
0x40298624 FULL SRAM data 1
DW1_CH_STRUCT24_TR_CMD
0x40298628 FULL Channel software trigger
9.2.1.26 CH_STRUCT 25
Register Name Address Permission Description
DW1_CH_STRUCT25_CH_CTL
0x40298640 FULL Channel control
DW1_CH_STRUCT25_CH_STATUS
0x40298644 FULL Channel status
DW1_CH_STRUCT25_CH_IDX
0x40298648 FULL Channel current indices
DW1_CH_STRUCT25_CH_CURR_PTR
0x4029864C FULL Channel current descriptor pointer
DW1_CH_STRUCT25_INTR
0x40298650 FULL Interrupt
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers