Infineon TRAVEO T2G - 7.5.3.7 CXPI_CH_TXPID_FI

Technical Reference Manual 002-29852 Rev. *B
7.5.3.7 CXPI_CH_TXPID_FI
Description:
TXPID and Frame Information
Address:
0x40518050
Offset:
0x50
Retention:
Retained
IsDeepSleep:
No
Comment:
This registers holds information on TX's PID, FI and DLCEXT
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name PID [7:0]
Bits 15 14 13 12 11 10 9 8
Name FI [15:8]
Bits 23 22 21 20 19 18 17 16
Name DLCEXT [23:16]
Bits 31 30 29 28 27 26 25 24
Name None [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:7 PID RW R Undefined Header protected identifier (PID).
- Bits 6 downto 0: frame identifier ID[6:0].
- Bits 7: is odd parity bit.
- PID[7] = ! (ID[6] ^ ID[5] ^ ID[4] ^ ID[3] ^ ID[2] ^ ID[1] ^
ID[0])
Software does not need to program the parity bit i.e.
bit[7]. HW will calculate the odd parity bit and ignore
the bit[7] if SW occupies this bit.
Transmission: To be transmitted PID field. HW will
ignore bit[7] and compute the parity bit based on
bits[6:0]
Note that, this field can be use by SW to send PType
byte as the HW handles both PID and PType the same
way. The frame type would occupy bit[6:0] and the odd
parity will be calculated by the HW.
8:15 FI RW R Undefined Frame Information.
This is the byte that will be transmitted as Frame
Information. Per CXPI spec,
FI[7:4] denotes the data length count (DLC).
FI[3:2] denotes Network Management. Bit[3] -
wakeup.ind Bit[2] - sleep.ind
FI[1:0] denotes CT. Please program to 2'b11 if no
support of counter.
16:23 DLCEXT RW R Undefined Data Length Count Extension.
This field is intended for payload of more than 12B.
This field is only valid if DLC=4'b1111 (FI[7:4]).
The value specified in this field will be the new payload
size. Valid values are 0-255.
780
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers