Infineon TRAVEO T2G - 16.25.4 PRT; 16.25.4.1 HSIOM_PRT_PORT_SEL0

Technical Reference Manual 002-29852 Rev. *B
16.25.4 PRT
16.25.4.1 HSIOM_PRT_PORT_SEL0
Description:
Port selection 0
Address:
0x40300000
Offset:
0x0
Retention:
Retained
IsDeepSleep:
No
Comment:
The High Speed IO Mux (HSIOM) selects the hardware peripheral connection to an IO pin.
The default setting of 'GPIO' leaves the pin under CPU control through firmware. Pin specific
connections for the 'DS_x' and 'ACT_x' settings are listed in the pinout section of the device
datasheet.
Note: when initializing IO's that are connected to a live bus (such as I2C), make sure the
peripheral and HSIOM is properly configured (HSIOM_PRT_SELx) before turning the IO on
(GPIO_PRT_CFG.DRIVE_MODEx) to avoid producing glitches on the bus.
Note: peripherals other than GPIO & UDB/DSI directly control both the output and output-
enable of the output buffer (peripherals can drive strong 0 or strong 1 in any mode except
OFF='0').
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name None [7:5] IO0_SEL [4:0]
Bits 15 14 13 12 11 10 9 8
Name None [15:13] IO1_SEL [12:8]
Bits 23 22 21 20 19 18 17 16
Name None [23:21] IO2_SEL [20:16]
Bits 31 30 29 28 27 26 25 24
Name None [31:29] IO3_SEL [28:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:4 IO0_SEL RW RW 0 Selects the peripheral connections of Pin 0. Note that
available connectivity options vary depending on the
device, port and the pin. See the device Datasheet for
a list of peripheral connections available at each pin.
GPIO 0 GPIO controls 'out'
GPIO_DSI 1 GPIO controls 'out', DSI controls 'output enable'
DSI_DSI 2 DSI controls 'out' and 'output enable'
DSI_GPIO 3 DSI controls 'out', GPIO controls 'output enable'
AMUXA 4 AMUXBUS A
AMUXB 5 AMUXBUS B
AMUXA_DSI 6 Analog mux bus A, DSI control
AMUXB_DSI 7 Analog mux bus B, DSI control
ACT_0 8 Active peripheral 0
ACT_1 9 Active peripheral 1
ACT_2 10 Active peripheral 2
ACT_3 11 Active peripheral 3
DS_0 12 Deep Sleep peripheral 0
DS_1 13 Deep Sleep peripheral 1
DS_2 14 Deep Sleep peripheral 2
DS_3 15 Deep Sleep peripheral 3
ACT_4 16 Active peripheral 4
1020
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers