Infineon TRAVEO T2G - 22.5.1.3 PROT_SMPU_MS2_CTL

Technical Reference Manual 002-29852 Rev. *B
22.5.1.3 PROT_SMPU_MS2_CTL
Description:
Master 2 protection context control
Address:
0x40230008
Offset:
0x8
Retention:
Retained
IsDeepSleep:
No
Comment:
Default:
0x303
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name None [7:2] NS [1:1] P [0:0]
Bits 15 14 13 12 11 10 9 8
Name None [15:10] PRIO [9:8]
Bits 23 22 21 20 19 18 17 16
Name PC_MASK
_0 [16:16]
Bits 31 30 29 28 27 26 25 24
Name PC_MASK_15_TO_1 [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0 P RW R 1 See MS0_CTL.P.
1 NS RW R 1 See MS0_CTL.NS.
8:9 PRIO RW R 3 See MS0_CTL.PRIO
16 PC_MASK_0 R R 0 See MS0_CTL.PC_MASK_0.
17:31 PC_MASK_15_TO_1 RW R 0 See MS0_CTL.PC_MASK_15_TO_1.
1323
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers