Infineon TRAVEO T2G - 9.3.18.10 DW_CH_STRUCT_SRAM_DATA1

Technical Reference Manual 002-29852 Rev. *B
9.3.18.10 DW_CH_STRUCT_SRAM_DATA1
Description:
SRAM data 1
Address:
0x40288024
Offset:
0x24
Retention:
Retained
IsDeepSleep:
No
Comment:
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name DATA [7:0]
Bits 15 14 13 12 11 10 9 8
Name DATA [15:8]
Bits 23 22 21 20 19 18 17 16
Name DATA [23:16]
Bits 31 30 29 28 27 26 25 24
Name DATA [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:31 DATA RW RW Undefined N/A
889
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers