Technical Reference Manual 002-29852 Rev. *B
Register Name Address Permission Description
PERI_MS_PPU_PR3_MS_ADDR
0x400100E0 FULL Master region, base address
PERI_MS_PPU_PR3_MS_SIZE
0x400100E4 FULL Master region, size
PERI_MS_PPU_PR3_MS_ATT0
0x400100F0 FULL Master attributes 0
PERI_MS_PPU_PR3_MS_ATT1
0x400100F4 FULL Master attributes 1
PERI_MS_PPU_PR3_MS_ATT2
0x400100F8 FULL Master attributes 2
PERI_MS_PPU_PR3_MS_ATT3
0x400100FC FULL Master attributes 3
21.5 PPU_PR 4
Register Name Address Permission Description
PERI_MS_PPU_PR4_SL_ADDR
0x40010100 FULL Slave region, base address
PERI_MS_PPU_PR4_SL_SIZE
0x40010104 FULL Slave region, size
PERI_MS_PPU_PR4_SL_ATT0
0x40010110 FULL Slave attributes 0
PERI_MS_PPU_PR4_SL_ATT1
0x40010114 FULL Slave attributes 1
PERI_MS_PPU_PR4_SL_ATT2
0x40010118 FULL Slave attributes 2
PERI_MS_PPU_PR4_SL_ATT3
0x4001011C FULL Slave attributes 3
PERI_MS_PPU_PR4_MS_ADDR
0x40010120 FULL Master region, base address
PERI_MS_PPU_PR4_MS_SIZE
0x40010124 FULL Master region, size
PERI_MS_PPU_PR4_MS_ATT0
0x40010130 FULL Master attributes 0
PERI_MS_PPU_PR4_MS_ATT1
0x40010134 FULL Master attributes 1
PERI_MS_PPU_PR4_MS_ATT2
0x40010138 FULL Master attributes 2
PERI_MS_PPU_PR4_MS_ATT3
0x4001013C FULL Master attributes 3
21.6 PPU_PR 5
Register Name
Address Permission Description
PERI_MS_PPU_PR5_SL_ADDR
0x40010140 FULL Slave region, base address
PERI_MS_PPU_PR5_SL_SIZE
0x40010144 FULL Slave region, size
PERI_MS_PPU_PR5_SL_ATT0
0x40010150 FULL Slave attributes 0
PERI_MS_PPU_PR5_SL_ATT1
0x40010154 FULL Slave attributes 1
PERI_MS_PPU_PR5_SL_ATT2
0x40010158 FULL Slave attributes 2
PERI_MS_PPU_PR5_SL_ATT3
0x4001015C FULL Slave attributes 3
PERI_MS_PPU_PR5_MS_ADDR
0x40010160 FULL Master region, base address
PERI_MS_PPU_PR5_MS_SIZE
0x40010164 FULL Master region, size
PERI_MS_PPU_PR5_MS_ATT0
0x40010170 FULL Master attributes 0
PERI_MS_PPU_PR5_MS_ATT1
0x40010174 FULL Master attributes 1
PERI_MS_PPU_PR5_MS_ATT2
0x40010178 FULL Master attributes 2
PERI_MS_PPU_PR5_MS_ATT3
0x4001017C FULL Master attributes 3
21.7 PPU_PR 6
Register Name Address Permission Description
PERI_MS_PPU_PR6_SL_ADDR
0x40010180 FULL Slave region, base address
PERI_MS_PPU_PR6_SL_SIZE
0x40010184 FULL Slave region, size
PERI_MS_PPU_PR6_SL_ATT0
0x40010190 FULL Slave attributes 0
PERI_MS_PPU_PR6_SL_ATT1
0x40010194 FULL Slave attributes 1
PERI_MS_PPU_PR6_SL_ATT2
0x40010198 FULL Slave attributes 2
PERI_MS_PPU_PR6_SL_ATT3
0x4001019C FULL Slave attributes 3
PERI_MS_PPU_PR6_MS_ADDR
0x400101A0 FULL Master region, base address
PERI_MS_PPU_PR6_MS_SIZE
0x400101A4 FULL Master region, size
PERI_MS_PPU_PR6_MS_ATT0
0x400101B0 FULL Master attributes 0
PERI_MS_PPU_PR6_MS_ATT1
0x400101B4 FULL Master attributes 1
PERI_MS_PPU_PR6_MS_ATT2
0x400101B8 FULL Master attributes 2
PERI_MS_PPU_PR6_MS_ATT3
0x400101BC FULL Master attributes 3
21.8 PPU_PR 7
Register Name Address Permission Description
PERI_MS_PPU_PR7_SL_ADDR
0x400101C0 FULL Slave region, base address
PERI_MS_PPU_PR7_SL_SIZE
0x400101C4 FULL Slave region, size
PERI_MS_PPU_PR7_SL_ATT0
0x400101D0 FULL Slave attributes 0
PERI_MS_PPU_PR7_SL_ATT1
0x400101D4 FULL Slave attributes 1
PERI_MS_PPU_PR7_SL_ATT2
0x400101D8 FULL Slave attributes 2
PERI_MS_PPU_PR7_SL_ATT3
0x400101DC FULL Slave attributes 3
PERI_MS_PPU_PR7_MS_ADDR
0x400101E0 FULL Master region, base address
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers